MM74C85 Magnitude Comparator Datasheet

MM74C85 Datasheet, PDF, Equivalent


Part Number

MM74C85

Description

4-Bit Magnitude Comparator

Manufacture

Fairchild

Total Page 5 Pages
Datasheet
Download MM74C85 Datasheet


MM74C85
October 1987
Revised January 1999
MM74C85
4-Bit Magnitude Comparator
General Description
The MM74C85 is a four-bit magnitude comparator which
will perform comparison of straight binary or BCD codes.
The circuit consists of eight comparing inputs (A0, A1, A2,
A3, B0, B1, B2, B3), three cascading inputs (A > B, A < B
and A = B), and three outputs (A > B, A < B and A = B).
This device compares two four-bit words (A and B) and
determines whether they are “greater than,” “less than,” or
“equal to” each other by a high level on the appropriate out-
put. For words greater than four-bits, units can be cas-
caded by connecting the outputs (A > B, A < B, and A = B)
of the least significant stage to the cascade inputs (A > B, A
< B and A = B) of the next-significant stage. In addition the
least significant stage must have a high level voltage
(VIN(1)) applied to the A = B input and low level voltage
(VIN(0)) applied to A > B and A < B inputs.
Features
s Wide supply voltage range: 3.0V to 15V
s Guaranteed noise margin: 1.0V
s High noise immunity: 0.4 VCC (typ.)
s Low power: TTL compatibility:
fan out of 2 driving 74L
s Expandable to 'N' stages
s Applicable to binary or BCD
s Low power pinout: 74L85
Ordering Code:
Order Number Package Number
Package Description
MM74C85N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Connection Diagram
Pin Assignments for DIP
Top View
© 1999 Fairchild Semiconductor Corporation DS005886.prf
www.fairchildsemi.com

MM74C85
Truth Table
Comparing Inputs
A3, B3 A2, B2 A1, B1
A3 > B3
X
X
A3 < B3
X
X
A3 = B3
A2 > B2
X
A3 = B3
A2 < B2
X
A3 = B3
A2 = B2 A1 > B1
A3 = B3
A2 = B2 A1 < B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
A3 = B3
A2 = B2 A1 = B1
H = HIGH Level, L = LOW Level, X = Irrelevant
Logic Diagram
A0, B0
X
X
X
X
X
X
A0 > B0
A0 < B0
A0 = B0
A0 = B0
A0 = B0
A0 = B0
A0 = B0
A0 = B0
A0 = B0
A0 = B0
Cascading Inputs
A>B A<B A=B
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
HLL
LHL
L LH
L HH
HLH
HHH
HHL
LLL
A>B
H
L
H
L
H
L
H
L
H
L
L
L
H
H
H
L
Outputs
A<B
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
L
A=B
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
www.fairchildsemi.com
2


Features MM74C85 4-Bit Magnitude Comparator Octo ber 1987 Revised January 1999 MM74C85 4-Bit Magnitude Comparator General Desc ription The MM74C85 is a four-bit magni tude comparator which will perform comp arison of straight binary or BCD codes. The circuit consists of eight comparin g inputs (A0, A1, A2, A3, B0, B1, B2, B 3), three cascading inputs (A > B, A < B and A = B), and three outputs (A > B, A < B and A = B). This device compares two four-bit words (A and B) and deter mines whether they are “greater than, ” “less than,” or “equal to” each other by a high level on the appro priate output. For words greater than f our-bits, units can be cascaded by conn ecting the outputs (A > B, A < B, and A = B) of the least significant stage to the cascade inputs (A > B, A < B and A = B) of the next-significant stage. In addition the least significant stage m ust have a high level voltage (VIN(1)) applied to the A = B input and low leve l voltage (VIN(0)) applied to A > B and A < B inputs. Features s Wide supp.
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