MM74C86 EXCLUSIVE-OR Gate Datasheet

MM74C86 Datasheet, PDF, Equivalent


Part Number

MM74C86

Description

Quad 2-Input EXCLUSIVE-OR Gate

Manufacture

National

Total Page 4 Pages
Datasheet
Download MM74C86 Datasheet


MM74C86
February 1988
MM54C86 MM74C86 Quad 2-Input EXCLUSIVE-OR Gate
General Description
Employing complementary MOS (CMOS) transistors to
achieve wide power supply operating range low power con-
sumption and high noise margin these gates provide basic
functions used in the implementation of digital integrated
circuit systems The N- and P-channel enhancement mode
transistors provide a symmetrical circuit with output swing
essentially equal to the supply voltage No DC power other
than that caused by leakage current is consumed during
static condition All inputs are protected from damage due
to static discharge by diode clamps to VCC and GND
Features
Y Wide supply voltage range
3 0V to 15V
Y Guaranteed noise margin
1 0V
Y High noise immunity
Y Low power
TTL compatibility
0 45 VCC (typ )
Fan out of 2
driving 74L
Y Low power consumption
10 nW package (typ )
Y The MM54C86 MM74C86 follows the
MM54LS86 MM74LS86 Pinout
Connection Diagram
Dual-In-Line Package
Truth Table
Top View
Order Number MM54C86 or MM74C86
TL F 5887 – 1
Inputs
Output
AB
Y
LL
LH
HL
HH
L
H
H
L
H e High Level L e Low Level
C1995 National Semiconductor Corporation TL F 5887
RRD-B30M105 Printed in U S A

MM74C86
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at any Pin (Note 1)
Operating Temperature Range
MM54C86
MM74C86
b0 3V to VCC a 0 3V
b55 C to a125 C
b40 C to a85 C
Storage Temperature Range
b65 C to a150 C
Power Dissipation (PD)
Dual-In-Line Package
Small Outline
Operating Range (VCC)
Absolute Maximum (VCC)
Lead Temperature (Soldering 10 seconds)
700 mW
500 mW
3 0V to 15V
18V
260 C
DC Electrical Characteristics Min max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min Typ Max Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VIN(0)
Logical ‘‘0’’ Input Voltage
VOUT(1)
Logical ‘‘1’’ Output Voltage
VOUT(0)
Logical ‘‘0’’ Output Voltage
IIN(1)
Logical ‘‘1’’ Input Current
IIN(0)
Logical ‘‘0’’ Input Current
ICC Supply Current
CMOS LPTTL INTERFACE
VCC e 5 0V
VCC e 10V
VCC e 5 0V
VCC e 10V
VCC e 5 0V IO e b10 mA
VCC e 10V IO e b10 mA
VCC e 5 0V IO e a10 mA
VCC e 10V IO e a10 mA
VCC e 15V VIN e 15V
VCC e 15V VIN e 0V
VCC e 15V
35
80
45
90
b1 0
15
20
0 005
b0 005
0 01
05
10
10
15
V
V
V
V
V
V
V
V
mA
mA
mA
VIN(1)
Logical ‘‘1’’ Input Voltage
54C VCC e 4 5V
74C VCC e 4 75V
VCCb1 5
VCCb1 5
VIN(0)
Logical ‘‘0’’ Input Voltage
54C VCC e 4 5V
74C VCC e 4 75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
54C VCC e 4 5V IO e b360 mA
74C VCC e 4 75V IO e b360 mA
24
24
VOUT(0)
Logical ‘‘0’’ Output Voltage
54C VCC e 4 5V IO e 360 mA
74C VCC e 4 75V IO e 360 mA
OUTPUT DRIVE (See 54 74C Family Characteristics Data Sheet) (Short Circuit Current)
V
V
08 V
08 V
V
V
04 V
04 V
ISOURCE
Output Source Current
(P-Channel)
VCC e 5 0V VOUT e 0V
TA e 25 C
b1 75
b3 3
mA
ISOURCE
Output Source Current
(P-Channel)
VCC e 10V VOUT e 0V
TA e 25 C
b8 0
b15
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5 0V VOUT e VCC
TA e 25 C
1 75 3 6
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 10V VOUT e VCC
TA e 25 C
8 0 16
mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
2


Features MM54C86 MM74C86 Quad 2-Input EXCLUSIVE-O R Gate February 1988 MM54C86 MM74C86 Quad 2-Input EXCLUSIVE-OR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide pow er supply operating range low power con sumption and high noise margin these ga tes provide basic functions used in the implementation of digital integrated c ircuit systems The N- and P-channel enh ancement mode transistors provide a sym metrical circuit with output swing esse ntially equal to the supply voltage No DC power other than that caused by leak age current is consumed during static c ondition All inputs are protected from damage due to static discharge by diode clamps to VCC and GND Features Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V Guaranteed noise margin 1 0V Hig h noise immunity 0 45 VCC (typ ) Low po wer Fan out of 2 TTL compatibility driv ing 74L Low power consumption 10 nW pac kage (typ ) The MM54C86 MM74C86 follows the MM54LS86 MM74LS86 Pinout Connection Diagram Dual-In-Line .
Keywords MM74C86, datasheet, pdf, National, Quad, 2-Input, EXCLUSIVE-OR, Gate, M74C86, 74C86, 4C86, MM74C8, MM74C, MM74, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)