MM74C90 Binary Counter Datasheet

MM74C90 Datasheet, PDF, Equivalent


Part Number

MM74C90

Description

4-Bit Decade Counter 4-Bit Binary Counter

Manufacture

Fairchild

Total Page 7 Pages
Datasheet
Download MM74C90 Datasheet


MM74C90
October 1987
Revised January 1999
MM74C90 • MM74C93
4-Bit Decade Counter • 4-Bit Binary Counter
General Description
The MM74C90 decade counter and the MM74C93 binary
counter and complementary MOS (CMOS) integrated cir-
cuits constructed with N- and P-channel enhancement
mode transistors. The 4-bit decade counter can reset to
zero or preset to nine by applying appropriate logic level on
the R01, R02, R91 and R92 inputs. Also, a separate flip-flop
on the A-bit enables the user to operate it as a divide-by-2,
5 or 10 frequency counter. The 4-bit binary counter can be
reset to zero by applying high logic level on inputs R01 and
R02, and a separate flip-flop on the A-bit enables the user
to operate it as a divide-by-2, -8, or -16 divider. Counting
occurs on the negative going edge of the input pulse.
All inputs are protected against static discharge damage.
Features
s Wide supply voltage range: 3V to 15V
s Guaranteed noise margin: 1V
s High noise immunity: 0.45 VCC (typ.)
s Low power compatibility:
Fan out of 2 TTL driving 74L
s The MM74C93 follows the MM74L93 Pinout
Ordering Code:
Order Number
MM74C90N
MM74C93N
Package Number
N14A
N14A
Package Description
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Connection Diagrams
MM74C90
Pin Assignments for DIP
MM74C93
Top View
Top View
© 1999 Fairchild Semiconductor Corporation DS005889.prf
www.fairchildsemi.com

MM74C90
Logic Diagrams
MM74C90
MM74C93
Truth Tables
MM74C90 4-Bit Decade Counter BCD Count Sequence
Count
Output
QD QC QB QA
0 LLLL
1 LL LH
2 LLHL
3 L LHH
4 LHLL
5 LHLH
6 LHHL
7 LHHH
8 HLLL
9 HL LH
Output QA is connected to Input B for BCD count.
H = HIGH Level
L = LOW Level
X = Irrelevant
MM74C93 4-Bit Binary Counter Binary Count Sequence
Count
Output
QD QC QB QA
0 LLLL
1 L LLH
2 L LHL
3 L LHH
4 LHLL
5 LHLH
6 LHHL
7 LHHH
8 HLLL
9 HLLH
10 H L H L
11 H L H H
12 H H L L
13 H H L H
14 H H H L
15 H H H H
Output QA is connected to input B for binary count sequence.
H = HIGH Level
L = LOW Level
X = Irrelevant
www.fairchildsemi.com
2


Features MM74C90 • MM74C93 4-Bit Decade Counter • 4-Bit Binary Counter October 1987 Revised January 1999 MM74C90 • MM74 C93 4-Bit Decade Counter • 4-Bit Bina ry Counter General Description The MM74 C90 decade counter and the MM74C93 bina ry counter and complementary MOS (CMOS) integrated circuits constructed with N - and P-channel enhancement mode transi stors. The 4-bit decade counter can res et to zero or preset to nine by applyin g appropriate logic level on the R01, R 02, R91 and R92 inputs. Also, a separat e flip-flop on the A-bit enables the us er to operate it as a divide-by-2, 5 or 10 frequency counter. The 4-bit binary counter can be reset to zero by applyi ng high logic level on inputs R01 and R 02, and a separate flip-flop on the A-b it enables the user to operate it as a divide-by-2, -8, or -16 divider. Counti ng occurs on the negative going edge of the input pulse. All inputs are protec ted against static discharge damage. F eatures s Wide supply voltage range: s Guaranteed noise margin: s High .
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