MM74C912 Display Controller/Driver Datasheet

MM74C912 Datasheet, PDF, Equivalent


Part Number

MM74C912

Description

6-Digit BCD Display Controller/Driver

Manufacture

Fairchild

Total Page 8 Pages
Datasheet
Download MM74C912 Datasheet


MM74C912
October 1987
Revised January 1999
MM74C912
6-Digit BCD Display Controller/Driver
General Description
The MM74C912 display controllers are interface elements,
with memory, that drive a 6-digit, 8-segment LED display.
The display controllers receive data information through 5
data inputs A, B, C, D and DP, and digit information through
3 address inputs K1, K2 and K3.
The input data is written into the register selected by the
address information when CHIP ENABLE, (CE), and
WRITE ENABLE, (WE), are LOW and is latched when
either CE or WE return HIGH. Data hold time is not
required. A self-contained internal oscillator sequentially
presents the stored data to a decoder where 4 data bits
control the format of the displayed character and 1 bit con-
trols the decimal point. The internal oscillator is controlled
by a control input labeled OSCILLATOR ENABLE, (OSE),
which is tied LOW in normal operation. A high level at OSE
prevents automatic refresh of the display.
The 7-segment plus decimal point output information
directly drives an LED display through high drive (100 mA
typ.) output drivers. The drivers are active when the control
pin labeled SEGMENT OUTPUT ENABLE, (SOE), is LOW
and go into 3-STATE when SOE is HIGH. This feature
allows for duty cycle brightness control and for disabling
the output drivers for power conservation.
The MM74C912 segment decoder converts BCD data into
7-segment format.
All inputs are TTL compatible and do not clamp to the VCC
supply.
Features
s Direct segment drive (100 mA typ.) 3-STATE
s 6 registers addressed like RAM
s Internal oscillator and scanning circuit
s Direct base drive to digit transistor (20 mA typ.)
s Internal segment decoder
s TTL compatible inputs
Ordering Code:
Order Number Package Number
Package Description
MM74C912N
N28B
28-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Connection Diagram
Dual-In-Line Package
Top View
© 1999 Fairchild Semiconductor Corporation DS005916.prf
www.fairchildsemi.com

MM74C912
Truth Tables
Input Control
X = Don’t Care
CE Digit Address WE
Operation
K3 K2 K1
0 0 0 0 0 Write Digit 1
0 0 0 0 1 Latch Digit 1
0 0 0 1 0 Write Digit 2
0 0 0 1 1 Latch Digit 2
0 0 1 0 0 Write Digit 3
0 0 1 0 1 Latch Digit 3
0 0 1 1 0 Write Digit 4
0 0 1 1 1 Latch Digit 4
0 1 0 0 0 Write Digit 5
0 1 0 0 1 Latch Digit 5
0 1 0 1 0 Write Digit 6
0 1 0 1 1 Latch Digit 6
0 1 1 0 0 Write Null Digit
0 1 1 0 1 Latch Null Digit
0 1 1 1 0 Write Null Digit
0 1 1 1 1 Latch Null Digit
1 X X X X Disable Writing
Output Control
SOE
0
0
OSE
0
1
Operation
Refresh Display
Stop Oscillator (Note 1)
1 0 Disable Segment Outputs
1 1 Standby Mode
Note 1: Segment drive may exceed maximum display dissipation.
www.fairchildsemi.com
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Features MM74C912 6-Digit BCD Display Controller/ Driver October 1987 Revised January 19 99 MM74C912 6-Digit BCD Display Contro ller/Driver General Description The MM7 4C912 display controllers are interface elements, with memory, that drive a 6- digit, 8-segment LED display. The displ ay controllers receive data information through 5 data inputs A, B, C, D and D P, and digit information through 3 addr ess inputs K1, K2 and K3. The input dat a is written into the register selected by the address information when CHIP E NABLE, (CE), and WRITE ENABLE, (WE), ar e LOW and is latched when either CE or WE return HIGH. Data hold time is not r equired. A self-contained internal osci llator sequentially presents the stored data to a decoder where 4 data bits co ntrol the format of the displayed chara cter and 1 bit controls the decimal poi nt. The internal oscillator is controll ed by a control input labeled OSCILLATO R ENABLE, (OSE), which is tied LOW in n ormal operation. A high level at OSE prevents automatic refresh.
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