MM74HC157 2-Input Multiplexer Datasheet

MM74HC157 Datasheet, PDF, Equivalent


Part Number

MM74HC157

Description

Quad 2-Input Multiplexer

Manufacture

Fairchild

Total Page 7 Pages
Datasheet
Download MM74HC157 Datasheet


MM74HC157
MM74HC157
Quad 2-Input Multiplexer
September 1983
Revised February 1999
General Description
The MM74HC157 high speed Quad 2-to-1 Line data selec-
tor/Multiplexers utilizes advanced silicon-gate CMOS tech-
nology. It possesses the high noise immunity and low
power consumption of standard CMOS integrated circuits,
as well as the ability to drive 10 LS-TTL loads.
This device consists of four 2-input digital multiplexers with
common select and STROBE inputs. When the STROBE
input is at logical “0” the four outputs assume the values as
selected from the inputs. When the STROBE input is at a
logical “1” the outputs assume logical “0”.
The 74HC logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by inter-
nal diode clamps to VCC and ground.
Features
s Typical propagation delay: 14 ns data to any output
s Wide power supply range: 2–6V
s Low power supply quiescent current: 80 µA maximum
(74HC Series)
s Fan-out of 10 LS-TTL loads
s Low input current: 1 µA maximum
Ordering Code:
Order Number Package Number
Package Description
MM74HC157M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC157SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC157MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC157N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Pin Assignments for DIP, SOIC, SOP and TSSOP
Strobe
H
L
L
L
L
Inputs
Select
X
L
L
H
H
AB
XX
LX
HX
XL
XH
Output
Y
L
L
H
L
H
H = HIGH Level,
L = LOW Level
X = Irrelevant
Top View
© 1999 Fairchild Semiconductor Corporation DS005314.prf
www.fairchildsemi.com

MM74HC157
Logic Diagram
www.fairchildsemi.com
2


Features MM74HC157 Quad 2-Input Multiplexer Sept ember 1983 Revised February 1999 MM74H C157 Quad 2-Input Multiplexer General D escription The MM74HC157 high speed Qua d 2-to-1 Line data selector/Multiplexer s utilizes advanced silicon-gate CMOS t echnology. It possesses the high noise immunity and low power consumption of s tandard CMOS integrated circuits, as we ll as the ability to drive 10 LS-TTL lo ads. This device consists of four 2-inp ut digital multiplexers with common sel ect and STROBE inputs. When the STROBE input is at logical “0” the four ou tputs assume the values as selected fro m the inputs. When the STROBE input is at a logical “1” the outputs assume logical “0”. The 74HC logic family is functionally as well as pin-out com patible with the standard 74LS logic fa mily. All inputs are protected from dam age due to static discharge by internal diode clamps to VCC and ground. Featu res s Typical propagation delay: 14 ns data to any output s Wide power supply range: 2–6V s Low power supply quies.
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