MM74HC244 3-STATE Buffer Datasheet

MM74HC244 Datasheet, PDF, Equivalent


Part Number

MM74HC244

Description

Octal 3-STATE Buffer

Manufacture

Fairchild

Total Page 8 Pages
Datasheet
Download MM74HC244 Datasheet


MM74HC244
September 1983
Revised May 2005
MM74HC244
Octal 3-STATE Buffer
General Description
The MM74HC244 is a non-inverting buffer and has two
active low enables (1G and 2G); each enable indepen-
dently controls 4 buffers. This device does not have
Schmitt trigger inputs.
These 3-STATE buffers utilize advanced silicon-gate
CMOS technology and are general purpose high speed
non-inverting buffers. They possess high drive current out-
puts which enable high speed operation even when driving
large bus capacitances. These circuits achieve speeds
comparable to low power Schottky devices, while retaining
the advantage of CMOS circuitry, i.e., high noise immunity,
and low power consumption. All three devices have a
fanout of 15 LS-TTL equivalent inputs.
All inputs are protected from damage due to static dis-
charge by diodes to VCC and ground.
Features
s Typical propagation delay: 14 ns
s 3-STATE outputs for connection to system buses
s Wide power supply range: 2–6V
s Low quiescent supply current: 80 PA
s Output current: 6 mA
Ordering Code:
Order Number Package Number
Package Description
MM74HC244WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
MM74HC244SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC244MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC244N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Connection Diagram
Truth Table
1G 1A 1Y 2G 2A 2Y
LLLLLL
LHHLHH
HL ZHL Z
HHZHHZ
H HIGH Level
L LOW Level
Z High Impedance
Top View
© 2005 Fairchild Semiconductor Corporation DS005327
www.fairchildsemi.com

MM74HC244
Logic Diagram
www.fairchildsemi.com
2


Features MM74HC244 Octal 3-STATE Buffer Septembe r 1983 Revised May 2005 MM74HC244 Octa l 3-STATE Buffer General Description T he MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not have S chmitt trigger inputs. These 3-STATE bu ffers utilize advanced silicon-gate CMO S technology and are general purpose hi gh speed non-inverting buffers. They po ssess high drive current outputs which enable high speed operation even when d riving large bus capacitances. These ci rcuits achieve speeds comparable to low power Schottky devices, while retainin g the advantage of CMOS circuitry, i.e. , high noise immunity, and low power co nsumption. All three devices have a fan out of 15 LS-TTL equivalent inputs. All inputs are protected from damage due t o static discharge by diodes to VCC and ground. Features s Typical propagatio n delay: 14 ns s 3-STATE outputs for co nnection to system buses s Wide power supply range: 2–6V s Low .
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