MM74HC32

MM74HC32 Quad 2-Input OR Gate September 1983 Revised February 1999 MM74HC32 Quad 2-Input OR Gate General Description The MM74HC32 OR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs providing high noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features s Typical propagation delay: 10 ns s Wide power supply range: 2–6V s Low quiescent current: 20 µA maximum (74HC Series) s Low input current: 1 µA maximum s Fanout of 10 LS-TTL loads Ordering Code: Order Number MM74HC32M MM74HC32SJ MM74HC32MTC MM74HC32N Package Number M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View Logic Diagram Y=A+B (1 of 4) © 1999 Fairchild Semiconductor Corporation DS005132.prf www....