MM74HC365 TRI-STATE Buffer Datasheet

MM74HC365 Datasheet, PDF, Equivalent


Part Number

MM74HC365

Description

Hex TRI-STATE Buffer Inverting Hex TRI-STATE Buffer Hex TRI-STATE Buffer Inverting Hex TRI-STATE Buffer

Manufacture

National

Total Page 9 Pages
Datasheet
Download MM74HC365 Datasheet


MM74HC365
January 1988
MM54HC365 MM74HC365 Hex TRI-STATE Buffer
MM54HC366 MM74HC366 Inverting Hex TRI-STATE Buffer
MM54HC367 MM74HC367 Hex TRI-STATE Buffer
MM54HC368 MM74HC368 Inverting Hex TRI-STATE Buffer
General Description
These TRI-STATE buffers are general purpose high speed
inverting and non-inverting buffers that utilize advanced sili-
con-gate CMOS technology They have high drive current
outputs which enable high speed operation even when driv-
ing large bus capacitances These circuits possess the low
power dissipation of CMOS circuitry yet have speeds com-
parable to low power Schottky TTL circuits All 4 circuits are
capable of driving up to 15 low power Schottky inputs
The MM54 74HC366 and the MM54 74HC368 are inverting
buffers where as the MM54 74HC365 and the MM54
74HC367 are non-inverting buffers The MM54 74HC365
and the MM54 74HC366 have two TRI-STATE control in-
puts (G1 and G2) which are NORed together to control all
six gates The MM54 74HC367 and the MM54 74HC368
also have two output enables but one enable (G1) controls
4 gates and the other (G2) controls the remaining 2 gates
All inputs are protected from damage due to static dis-
charge by diodes to VCC and ground
Features
Y Typical propagation delay 15 ns
Y Wide operating voltage range 2V – 6V
Y Low input current 1 mA maximum
Y Low quiescent current 80 mA maximum (74 Series)
Y Output drive capability 15 LS-TTL loads
Connection Diagrams
Dual-In-Line Packages Top Views
TL F 5209 – 1
Order Number MM54HC365 or MM74HC365
TL F 5209 – 2
Order Number MM54HC366 or MM74HC366
TL F 5209 – 3
Order Number MM54HC367 or MM74HC367
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5209
TL F 5209 – 4
Order Number MM54HC368 or MM74HC368
RRD-B30M105 Printed in U S A

MM74HC365
Absolute Maximum Ratings (Notes 1 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK IOK)
DC Output Current per pin (IOUT)
DC VCC or GND Current per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S O Package only
b0 5 to a7 0V
b1 5 to VCCa1 5V
b0 5 to VCCa0 5V
g20 mA
g35 mA
g70 mA
b65 C to a150 C
600 mW
500 mW
Lead Temp (TL) (Soldering 10 seconds)
260 C
Operating Conditions
Supply Voltage VCC
DC Input or Output Voltage
VIN VOUT
Operating Temp Range (TA)
MM HC
MM HC
Min
b
b
Input Rise or Fall Times
tr tf VCCe V
VCCe V
VCCe V
Max
VCC
a
a
Units
V
V
C
C
ns
ns
ns
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VCC TAe25 C
Typ
74HC
54HC
TAeb40 to 85 C TAeb55 to 125 C Units
Guaranteed Limits
VIH Minimum High Level Input
Voltage
V
V
V
V
V
V
VIL Maximum Low Level Input
Voltage
V
V
V
V
V
V
VOH
Minimum High Level Output VINeVIH or VIL
Voltage
lIOUTls mA
V
V
V
V
V
V
VINeVIH or VIL
lIOUTls mA
lIOUTls mA
VOL Maximum Low Level Output VINeVIH or VIL
Voltage
lIOUTls mA
V
V
V
V
V
V
V
V
V
V
VINeVIH or VIL
lIOUTls mA
lIOUTls mA
V
V
V
V
IIN
Maximum Input Current
VINeVCC or GND
V
g
g
g mA
IOZ Maximum TRI STATE Output VOUTeVCC or GND V
Leakage Current
GeVIH
g
g
g mA
ICC Maximum Quiescent Supply VINeVCC or GND V
Current
IOUTe mA
mA
Note 1 Maximum Ratings are those values beyond which damage to the device may occur
Note 2 Unless otherwise specified all voltages are referenced to ground
Note 3 Power Dissipation temperature derating plastic ‘‘N’’ package b12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b12 mW C from 100 C to 125 C
Note 4 For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus the 4 5V values should be used when designing
with this supply Worst case VIH and VIL occur at VCCe5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current (IIN ICC and
IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used
VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89
2


Features MM54HC365 MM54HC366 MM54HC367 MM54HC368 MM74HC365 MM74HC366 MM74HC367 MM74HC368 January 1988 MM54HC365 MM54HC366 MM5 4HC367 MM54HC368 MM74HC365 Hex TRI-STA TE Buffer MM74HC366 Inverting Hex TRI-S TATE Buffer MM74HC367 Hex TRI-STATE Buf fer MM74HC368 Inverting Hex TRI-STATE B uffer six gates The MM54 74HC367 and th e MM54 74HC368 also have two output ena bles but one enable (G1) controls 4 gat es and the other (G2) controls the rema ining 2 gates All inputs are protected from damage due to static discharge by diodes to VCC and ground General Descr iption These TRI-STATE buffers are gene ral purpose high speed inverting and no n-inverting buffers that utilize advanc ed silicon-gate CMOS technology They ha ve high drive current outputs which ena ble high speed operation even when driv ing large bus capacitances These circui ts possess the low power dissipation of CMOS circuitry yet have speeds compara ble to low power Schottky TTL circuits All 4 circuits are capable of driving up to 15 low power Schott.
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