MM74HC4316 Level Translator Datasheet

MM74HC4316 Datasheet, PDF, Equivalent


Part Number

MM74HC4316

Description

Quad Analog Switch with Level Translator

Manufacture

Fairchild

Total Page 9 Pages
Datasheet
Download MM74HC4316 Datasheet


MM74HC4316
February 1984
Revised February 1999
MM74HC4316
Quad Analog Switch with Level Translator
General Description
The MM74HC4316 devices are digitally controlled analog
switches implemented in advanced silicon-gate CMOS
technology. These switches have low “ON” resistance and
low “OFF” leakages. They are bidirectional switches, thus
any analog input may be used as an output and vice-versa.
Three supply pins are provided on the MM74HC4316 to
implement a level translator which enables this circuit to
operate with 0–6V logic levels and up to ±6V analog switch
levels. The MM74HC4316 also has a common enable input
in addition to each switch's control which when LOW will
disable all switches to their OFF state. All analog inputs
and outputs and digital inputs are protected from electro-
static damage by diodes to VCC and ground.
Features
s Typical switch enable time: 20 ns
s Wide analog input voltage range: ±6V
s Low “ON” resistance:
50 typ. (VCCVEE = 4.5V) 30 typ. (VCCVEE = 9V)
s Low quiescent current: 80 µA maximum (74HC)
s Matched switch characteristics
s Individual switch controls plus a common enable
Ordering Code:
Order Number Package Number
Package Description
MM74HC4316M
M16A
16-Lead Small Outline Integrated Package (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC4316SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4316MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-1536, 4.4mm Wide
MM74HC4316N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Truth Table
Top View
Inputs
En CTL
HX
LL
LH
Switch
I/O–O/I
“OFF”
“OFF”
“ON”
© 1999 Fairchild Semiconductor Corporation DS005369.prf
www.fairchildsemi.com

MM74HC4316
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC)
0.5 to +7.5V
Supply Voltage (VEE)
+0.5 to 7.5V
DC Control Input Voltage (VIN)
1.5 to VCC +1.5V
DC Switch I/O Voltage (VIO)
VEE0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)
±20 mA
DC Output Current, per pin (IOUT)
±25 mA
DC VCC or GND Current, per pin (ICC)
±50 mA
Storage Temperature Range (TSTG)
65°C to +150°C
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260°C
Min Max Units
Supply Voltage (VCC)
Supply Voltage (VEE)
DC Input or Output Voltage
26
0 6
V
V
(VIN, VOUT)
Operating Temperature Range (TA)
Input Rise or Fall Times
0
40
VCC
+85
V
°C
(tr, tf) VCC = 2.0V
1000 ns
VCC = 4.5V
500 ns
VCC = 6.0V
400 ns
VCC = 12.0V
250 ns
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package:
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VEE VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C Units
Guaranteed Limits
VIH Minimum HIGH Level
Input Voltage
2.0V
4.5V
1.5
3.15
1.5
3.15
1.5
3.15
V
V
6.0V
4.2 4.2
4.2 V
VIL Maximum LOW Level
Input Voltage
2.0V
4.5V
0.5
1.35
0.5
1.35
0.5
1.35
V
V
6.0V
1.8 1.8
1.8 V
RON
Minimum “ON” Resistance
(Note 5)
VCTL = VIH, IS = 2.0 mA
VIS = VCC to VEE
(Figure 1)
GND
4.5V
6.0V
4.5V
4.5V
6.0V
100
40
30
170
85
70
200
105
85
220
110
90
GND 2.0V 100
180
215
240
VCTL = VIH, IS = 2.0 mA
VIS = VCC or VEE
(Figure 1)
GND
4.5V
6.0V
4.5V
4.5V
6.0V
40
50
20
80
60
40
100
75
60
120
80
70
RON
Maximum “ON” Resistance VCTL = VIH
Matching
VIS = VCC to VEE
GND
4.5V
6.0V
4.5V
4.5V
6.0V
10
5
5
15
10
10
20
15
15
20
15
15
IIN Maximum Control
Input Current
VIN = VCC or GND
GND 6.0V
±0.1
±1.0
±1.0
µA
IIZ
Maximum Switch “OFF”
VOS = VCC or VEE
GND 6.0V
Leakage Current
VIS = VEE or VCC
6.0V 6.0V
VCTL = VIL (Figure 2)
IIZ
Maximum Switch “ON”
VIS = VCC to VEE
GND 6.0V
Leakage Current
VCTL = VIH, VOS = OPEN 6.0V 6.0V
(Figure 3)
±60
±100
±40
±60
±600
±1000
±150
±300
±600
±1000
±150
±300
nA
nA
nA
nA
ICC Maximum Quiescent
VIN = VCC or GND
GND 6.0V
2.0 20
40 µA
Supply Current
IOUT = 0 µA
6.0V 6.0V
8.0 80
160 µA
Note 4: For a power supply of 5V ±10% the worst case on resistances (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC=5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs
for CMOS at the higher voltage and so the 5.5V values should be used.
Note 5: At supply voltages (VCC–VEE) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
www.fairchildsemi.com
2


Features MM74HC4316 Quad Analog Switch with Level Translator February 1984 Revised Febr uary 1999 MM74HC4316 Quad Analog Switc h with Level Translator General Descrip tion The MM74HC4316 devices are digital ly controlled analog switches implement ed in advanced silicon-gate CMOS techno logy. These switches have low “ON” resistance and low “OFF” leakages. They are bidirectional switches, thus a ny analog input may be used as an outpu t and vice-versa. Three supply pins are provided on the MM74HC4316 to implemen t a level translator which enables this circuit to operate with 0–6V logic l evels and up to ±6V analog switch leve ls. The MM74HC4316 also has a common en able input in addition to each switch's control which when LOW will disable al l switches to their OFF state. All anal og inputs and outputs and digital input s are protected from electrostatic dama ge by diodes to VCC and ground. Featur es s Typical switch enable time: 20 ns s Wide analog input voltage range: ±6V s Low “ON” resistance: 50 typ. (VCC.
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