MM74HC594 Output Registers Datasheet

MM74HC594 Datasheet, PDF, Equivalent


Part Number

MM74HC594

Description

8-Bit Shift Register with Output Registers

Manufacture

Fairchild

Total Page 7 Pages
Datasheet
Download MM74HC594 Datasheet


MM74HC594
January 1992
Revised May 1999
MM74HC594
8-Bit Shift Register with Output Registers
General Description
This high speed shift register utilizes advanced silicon-gate
CMOS technology. This device possesses the high noise
immunity and low power consumption of standard CMOS
integrated circuits, as well as the ability to drive 15 LS-TTL
loads.
This device contains an 8-bit serial-in, parallel-out shift reg-
ister that feeds an 8-bit D-type storage register. Separate
clocks and direct overriding clears are provided for both the
shift register and the storage register. The shift register has
a direct-overriding clear, serial input, and serial output
(standard) pins for cascading. Both the shift register and
storage register use positive-edge triggered clocks. If both
clocks are connected together, the shift register state will
always be one clock pulse ahead of the storage register.
The 74HC logic family is speed, function, and pin-out com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to VCC and ground.
Features
s Low quiescent current: 80 µA maximum
s Low input current: 1 µA maximum
s 8-bit serial-in, parallel-out shift register with storage
s Wide operating voltage range: 2V to 6V
s Cascadable
s Shift register has direct clear
s Guaranteed shift frequency: DC to30 MHz
Ordering Code:
Order Number Package Number
Package Description
MM74HC594M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
MM74HC594N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
RCK
X
X
X
SCK SCLR RCLR
Function
X X L Storage Register cleared
Shift Register cleared
XLX
Q’H = 0
Shift Register clocked
HH
QN = Qn1, Q0 = SER
Contents of Shift
X H H Register transferred
to output latches
© 1999 Fairchild Semiconductor Corporation DS010915.prf
www.fairchildsemi.com

MM74HC594
Logic Diagram
www.fairchildsemi.com
2


Features MM74HC594 8-Bit Shift Register with Outp ut Registers January 1992 Revised May 1999 MM74HC594 8-Bit Shift Register wi th Output Registers General Description This high speed shift register utilize s advanced silicon-gate CMOS technology . This device possesses the high noise immunity and low power consumption of s tandard CMOS integrated circuits, as we ll as the ability to drive 15 LS-TTL lo ads. This device contains an 8-bit seri al-in, parallel-out shift register that feeds an 8-bit D-type storage register . Separate clocks and direct overriding clears are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output (standard) pins for cascading. Both th e shift register and storage register u se positive-edge triggered clocks. If b oth clocks are connected together, the shift register state will always be one clock pulse ahead of the storage regis ter. The 74HC logic family is speed, function, and pin-out comp.
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