Digital Multiplexer. MM74HCT151 Datasheet


MM74HCT151 Multiplexer. Datasheet pdf. Equivalent


MM74HCT151


8-Channel Digital Multiplexer
MM54HCT151 MM74HCT151 8-Channel Digital Multiplexer

November 1995

MM54HCT151 MM74HCT151 8-Channel Digital Multiplexer
General Description
This high speed Digital multiplexer utilizes advanced silicongate CMOS technology Along with the high noise immunity and low power dissipation of standard CMOS integrated circuits it possesses the ability to drive 10 LS-TTL loads The MM54HCT151 MM74HCT151 selects one of the 8 data sources depending on the address presented on the A B and C inputs It features both true (Y) and complement (W) outputs The STROBE input must be at a low logic level to enable this multiplexer A high logic level at the STROBE forces the W output high and the Y output low MM54HCT MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices These parts are also plug-in replacements for LSTTL devices and can be used to reduce power consumption in existing designs

Features
Y Y

Y Y Y

Typical propagation delay 20 ns Low quiescent supply current 40 mA maximum (74HCT Series) Low input current 1 mA maximum Fanout of 10 LS-TTL loads TTL input compatible

Connection and Logic Diagrams
Dual-In-Line Package

Truth Table
Inputs C X L L L L H H H H Select B X L L H H L L H H A X L H L H L H L H Strobe S H L L L L L L L L Outputs Y L D D D D D D D D W H D D D D D D D D

TL F 9399 – 1

H e High Level L e Low Level X e Don’t Care D0 D1 D7 e...



MM74HCT151
November 1995
MM54HCT151 MM74HCT151
8-Channel Digital Multiplexer
General Description
This high speed Digital multiplexer utilizes advanced silicon-
gate CMOS technology Along with the high noise immunity
and low power dissipation of standard CMOS integrated cir-
cuits it possesses the ability to drive 10 LS-TTL loads The
MM54HCT151 MM74HCT151 selects one of the 8 data
sources depending on the address presented on the A B
and C inputs It features both true (Y) and complement (W)
outputs The STROBE input must be at a low logic level to
enable this multiplexer A high logic level at the STROBE
forces the W output high and the Y output low
MM54HCT MM74HCT devices are intended to interface be-
tween TTL and NMOS components and standard CMOS
devices These parts are also plug-in replacements for LS-
TTL devices and can be used to reduce power consumption
in existing designs
Features
Y Typical propagation delay 20 ns
Y Low quiescent supply current 40 mA maximum
(74HCT Series)
Y Low input current 1 mA maximum
Y Fanout of 10 LS-TTL loads
Y TTL input compatible
Connection and Logic Diagrams
Dual-In-Line Package
Top View
TL F 9399 – 1
Order Number MM54HCT151 or MM74HCT151
Truth Table
Inputs
Select
CBA
Strobe
S
Outputs
YW
XXX
H
LH
LLL L D D
LLH L D D
LHL L D D
LHH L D D
HLL L D D
HLH L D D
HHL L D D
HHH L D D
H e High Level L e Low Level X e Don’t Care
D0 D1 D7 e the level of the respective D input
C1995 National Semiconductor Corporation TL F 9399
TL F 9399 – 2
RRD-B30M115 Printed in U S A

MM74HCT151
Absolute Maximum Ratings (Notes 1 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VCC)
b0 5V to a7 0V
DC Input Voltage (VIN)
b1 5V to VCCa1 5V
DC Output Voltage (VOUT)
b0 5V to VCCa0 5V
Clamp Diode Current (IIK IOK)
g20 mA
DC Output Current per Pin (IOUT)
g25 mA
DC VCC or GND Current per Pin (ICC)
g50 mA
Storage Temperature Range (TSTG)
b65 C to a150 C
Power Dissipation (PD)
(Note 3)
600 mW
S O Package only
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260 C
Operating Conditions
Supply Voltage (VCC)
DC Input or Output Voltage
(VIN VOUT)
Operating Temp Range (TA)
MM74HCT
MM54HCT
Min
45
0
b40
b55
Input Rise or Fall Times
(tr tf)
Max
55
VCC
a85
a125
500
Units
V
V
C
C
ns
DC Electrical Characteristics (Note 4)
Symbol Parameter
Conditions
74HCT
54HCT
VCC TAe25 C TA e b40 C to a85 C TA e b55 C to a125 C Units
Typ Guaranteed Limits
VIH Minimum High Level
Input Voltage
V
VIL Maximum Low Level
Input Voltage
V
VOH Minimum High Level VIN e VIH or VIL
Output Voltage
lIOUTl s mA
VIN e VIH or VIL
lIOUTl s mA
lIOUTl s mA
VOL Maximum Low Level VIN e VIH or VIL
Output Voltage
lIOUTl e mA
lIOUTl e mA
lIOUTl e mA
IIN Maximum Input VIN e VCC or GND
Current
V
V
V
V
V
V
g
g
V
V
V
V
V
V
g mA
ICC Maximum Quiescent VIN e VCC or GND
Supply Current
IOUT e mA
mA
VIN e V or V Note
mA
Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2 Unless otherwise specified all voltages are referenced to ground
Note 3 Power Dissipation temperature derating plastic ‘‘N’’ package b12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b12 mW C from 100 C to 125 C
Note 4 For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HCT at 4 5V Thus the 4 5V values should be used when
designing with this supply Worst case VIH and VIL occur at VCC e 5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current
(IIN ICC and IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used
2




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