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87C196CB Dataheets PDF



Part Number 87C196CB
Manufacturers Intel Corporation
Logo Intel Corporation
Description ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2.0
Datasheet 87C196CB Datasheet87C196CB Datasheet (PDF)

87C196CA 87C196CB 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2 0 Automotive Y High Performance CHMOS 16-Bit CPU (up to 20 MHz Operation) Register-Register Architecture Up to 56 Kbytes of On-Chip EPROM Up to 1 5 Kbyte of On-Chip Register RAM Up to 512 Bytes of Additional RAM (Code RAM) Up to 16 Mbyte Linear Address Space Supports CAN (Controller Area Network) Specification 2 0 15 Message Objects of 8 Bytes Data Length 10-Bit A D with Sample Hold 38 Prioritized Interrupts Up.

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87C196CA 87C196CB 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2 0 Automotive Y High Performance CHMOS 16-Bit CPU (up to 20 MHz Operation) Register-Register Architecture Up to 56 Kbytes of On-Chip EPROM Up to 1 5 Kbyte of On-Chip Register RAM Up to 512 Bytes of Additional RAM (Code RAM) Up to 16 Mbyte Linear Address Space Supports CAN (Controller Area Network) Specification 2 0 15 Message Objects of 8 Bytes Data Length 10-Bit A D with Sample Hold 38 Prioritized Interrupts Up to Seven 8-Bit (60) I O Ports Full Duplex Serial Port (SIO) with Dedicated Baudrate Generator Y Full Duplex Synchronous Serial I O Port (SSIO) Interprocessor Communication Slave Port Selectable Bus Timing Modes for Flexible Interfacing Oscillator Fail Detection Circuitry High Speed Peripheral Transaction Server (PTS) Two Dedicated 16-Bit High-Speed Compare Registers High Speed Capture Compare (EPA) Two Flexible 16-Bit Timer Counters Flexible 8- 16-Bit External Bus (Programmable) Programmable Bus (HLD HLDA) 1 4 ms 16 x 16 Multiply 2 4 ms 32 16 Divide Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y b 40 C to a 125 C Ambient Device 87C196CB 87C196CB 87C196CA Pins Package 84-Pin PLCC 100-Pin QFP 68-Pin PLCC EPROM 56K 56K 32K Reg RAM 1 5K 1 5K 1 0K Code RAM 512b 512b 256b I O 56 60 38 EPA 10 10 6 SIO Y Y Y SSIO Y Y Y CAN Y Y Y A D 8 8 6 Address Space 1 Mbyte 16 Mbyte 64 Kbyte The 87C196CA CB are new members of the MCS 96 microcontroller family These devices are based upon the MCS 96 Kx Jx microcontroller product families with enhancements ideal for automotive and industrial applications The CA CB are the first devices in the Kx family to support networking through the integration of the CAN 2 0 (Controller Area Network) peripheral on-chip The 87C196CB offers the highests memory density of the MCS 96 microcontroller family with 56K of on-chip EPROM 1 5K of on-chip register RAM and 512 bytes of additional RAM (Code RAM) In addition the 87C196CB provides up to 16 Mbyte of Linear Address Space The 87C196CA is a sub-set of the CB offering 32K of on-chip EPROM up to 1 0K of on-chip register RAM and 256 bytes of additional RAM (Code RAM) Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1996 April 1996 Order Number 272405-004 87C196CA 87C196CB The MCS 96 microcontroller family members are all high-performance microcontrollers with a 16-bit CPU The 87C196CB is composed of the high-speed (20 MHz) macrocore with up to 16 Mbyte linear address space 56 Kbytes of program EPROM up to 1 5 Kbytes of register RAM and up to 512 bytes of code RAM (16-bit addressing modes) with the ability to execute from this RAM space It supports the high-speed serial communications protocol CAN 2 0 with 15 message objects of 8 bytes data length an 8-channel 10-bit 3 LSB analog to digital converter with programmable S H times and conversion times k 20 ms at 20 MHz It has an asynchronous synchronous serial I O port (SIO) with a dedicated 16-bit baud rate generator an additional synchronous serial I O port (SSIO) with full duplex master slave transceivers a flexible timer counter structure with prescaler cascading and quadrature capabilities There are ten modularized multiplexed highspeed I O for capture and compare (called Event Processor Array) with 200 ns resolution and double buffered inputs and a sophisticated prioritized interrupt structure with programmable Peripheral Transaction Server (PTS) implementing several channel modes including single burst block transfers from any memory location to any memory location a PWM and PWM toggle mode to be used in conjunction with the EPA and an A D scan mode NOTICE This is an advance information data sheet The A C and D C parameters contained within this data sheet may change after full automotive temperature characterization of the device has been performed Contact your local sales office before finalizing the timing and D C characteristics of a design to verify you have the latest information 272405 – 30 Figure 1 8XC196CB Block Diagram 2 87C196CA 87C196CB All thermal impedance data is approximate for static air conditions at 1 0W of power dissipation Values will change depending on operation conditions and application See the Intel Packaging Handbook (order number 240800) for a description of Intel’s thermal impedance test methodology PROCESS INFORMATION These devices are manufactured on P629 5 a CHMOS III-E process Additional process and reliability information is available in Intel’s Components Qua.


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