8840

ispLSI 8840 ® In-System Programmable SuperBIG™ High Density PLD Features SuperBIG HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 5V Power Supply — 45,000 PLD Gates/840 Macrocells — Up to 312 I/O Pins Supporting 3.3V/5V I/O — 1152 Registers — High-Speed Global and Big Fast Megablock (BFM) Interconnect — Wide 20-Macrocell Generic Logic Block (GLB) for High Performance — Wide Input Gating (44 Inputs per GLB) for Fast Counters, State Machines, Address Decoders, Etc. — PCB-Efficient Ball Grid Array (BGA) Package Options HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 110 MHz Maximum Operating Frequency — tpd = 8.5 ns Propagation Delay — TTL Compatible Inputs and 3.3V/5V Outputs — PCI Compatible Inputs, Outputs and Speed Grades — Electrically Erasable and Reprogrammable — Non-Volatile — Programmable Speed/Power Logic Path Optimization IN-SYSTEM PROGRAMMABLE — Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quality — Reprogram Soldered Devices for Faster Debugging 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE AND 5V IN-SYSTEM PROGRAMMABLE ARCHITECTURE FEATURES — Enhanced Pin-Locking Architecture, Symmetrical Generic Logic Blocks Connected by Hierarchical Big Fast Megablock and Global Routing Planes — Product Term Sharing Array Supports up to 28 Product Terms per Macrocell Output — Macrocells Support Concurrent Combinatorial and Registered Functions — Embedded Tristate Bus Can Be Used as an Internal Tristate Bus or as an Extension of an External Tristate Bus ...