9202 Datasheet | Flash Programmable System Devices with 8032 Microcontroller Core





9202 PDF File (Datasheet) Download

Part Number 9202
Description Flash Programmable System Devices with 8032 Microcontroller Core
Manufacture STMicroelectronics
Total Page 30 Pages
PDF Download Download 9202 PDF File

Features: UPSD3254A, UPSD3254BV UPSD3253B, UPSD325 3BV Flash Programmable System Devices w ith 8032 Microcontroller Core FEATURES SUMMARY s The uPSD325X devices combine a Flash PSD architecture with an 8032 m icrocontroller core. The uPSD325X devic es of Flash PSDs feature dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory fu nctions and access via USB, I2C, ADC, D DC and PWM channels, and an on-board 80 32 microcontroller core, with two UARTs , three 16-bit Timer/Counters and two E xternal Interrupts. As with other Flash PSD families, the uPSD325X devices are also in-system programmable (ISP) via a JTAG ISP interface. s Large 32KByte S RAM with battery back-up option s Figu re 1. 52-lead, Thin, Quad, Flat Package TQFP52 (T) Dual bank Flash memories – 128KByte or 256KByte main Flash mem ory – 32KByte secondary Flash memory s Content Security – Block access t o Flash memory www.DataSheet4U.com Fi gure 2. 80-lead, Thin, Quad, Flat Package s Programmable Decode PLD.

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UPSD3254A, UPSD3254BV
UPSD3253B, UPSD3253BV
Flash Programmable System Devices
with 8032 Microcontroller Core
FEATURES SUMMARY
s The uPSD325X devices combine a Flash PSD
architecture with an 8032 microcontroller core.
The uPSD325X devices of Flash PSDs feature
dual banks of Flash memory, SRAM, general
purpose I/O and programmable logic, supervi-
sory functions and access via USB, I2C, ADC,
DDC and PWM channels, and an on-board
8032 microcontroller core, with two UARTs,
three 16-bit Timer/Counters and two External
Interrupts. As with other Flash PSD families, the
uPSD325X devices are also in-system pro-
grammable (ISP) via a JTAG ISP interface.
s Large 32KByte SRAM with battery back-up
option
Figure 1. 52-lead, Thin, Quad, Flat Package
TQFP52 (T)
s Dual bank Flash memories
– 128KByte or 256KByte main Flash memory
– 32KByte secondary Flash memory
s Content Security
– Block access to Flash memory
www.DataSheet4U.com
Figure 2. 80-lead, Thin, Quad, Flat Package
s Programmable Decode PLD for flexible address
mapping of all memories within 8032 space.
s High-speed clock standard 8032 core (12-cycle)
s USB Interface (some devices only)
s I2C interface for peripheral connections
s 5 Pulse Width Modulator (PWM) channels
s Analog-to-Digital Converter (ADC)
s Standalone Display Data Channel (DDC)
s Six I/O ports with up to 46 I/O pins
s 3000 gate PLD with 16 macrocells
TQFP80 (U)
s Supervisor functions with Watchdog Timer
s In-System Programming (ISP) via JTAG
s Zero-Power Technology
s Single Supply Voltage
– 4.5 to 5.5V
– 3.0 to 3.6V
September 2003
Rev. 1.2
1/175

                    
                    






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