A/D Converter. NTE2055 Datasheet

NTE2055 Converter. Datasheet pdf. Equivalent

Part NTE2055
Description Integrated Circuit CMOS / 3 1/2 Digit A/D Converter
Feature NTE2055 Integrated Circuit CMOS, 3 1/2 Digit A/D Converter Description: The NTE2055 is a high perfor.
Manufacture NTE
Datasheet
Download NTE2055 Datasheet

NTE2055 Integrated Circuit CMOS, 3 1/2 Digit A/D Converter D NTE2055 Datasheet
Recommendation Recommendation Datasheet NTE2055 Datasheet





NTE2055
NTE2055
Integrated Circuit
CMOS, 3 1/2 Digit A/D Converter
Description:
The NTE2055 is a high performance, low power, 3 1/2 digit A/D converter combining both linear CMOS and
digital CMOS circuits on a single monolithic IC. Available in a 24–Lead DIP type package, this device is de-
signed to minimize use of external components. With two external resistors and two external capacitors, the
system forms a dual slope A/D converter with automatic zero correction and automatic polarity.
The NTE2055 is ratiometric and may be used over a full–scale range from 1.999V to 199.9mV. Systems using
this device may operate over a wide range of power supply voltages for ease of use with batteries, or with stan-
dard 5V supplies. The output drive conforms with standard B–Series CMOS specifications and can drive a
low–power Schottky TTL load.
The high impedance MOS inputs allow applications in current and resistance meters as well as voltmeters.
In addition to DVM/DPM applications, the NTE2055 finds use in digital thermometers, digital scales, remote
A/D, A/D control systems, and in MPU systems.
Features:
D Accuracy: ±0.05% of Reading ±1 Count
D Two Voltage Ranges: 1.999V and 199.9mV
D Up to 25 Conversions /s
D Zin > 100M
D Auto–Polarity and Auto–Zero
D Single Positive Voltage Reference
D Standard B–Series CMOS Outputs: Drives One Low Power Schottky Load
D Uses On–Chip System Clock, or External Clock
D Wide Supply Range: e.g., ±4.5V to ±8.0V
D Overrange and Underrange Signals Available
D Operates in Auto Ranging Circuits
D Operates with LED and LCD Displays
D Low External Component Count
D Chip Complexity: 1326 FETs
Absolute Maximum Ratings:
DC Supply Voltage, VDD to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5V to +18V
Voltage, Ant Pin, Referenced to VEE, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5V to VDD+0.5V
DC Input Current, Per Pin, Iin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40° to +85°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Note
1. This device contains circuitry to protect the inputs against damage due to high static voltages or electric
fields; however, it is advised that normal precautions be taken to avoid applications of any voltage higher
than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that
Vin and Vout be constrained to the range VEE (Vin or Vout) VDD.
Recommended Operating Conditions: (VSS = 0 or VEE)
DC Supply Voltage
VDD to Analog GND, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0 to 8.0V
VEE to Analog GND, VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –2.8 to –8.0V
Clock Frequency, fClk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 to 400kHz
Zero Offset Correction Capacitor, Co . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1 ±20%µF



NTE2055
Electrical Characteristics: (CI = 0.1µF mylar, RI = 470k@ Vref = 2V, RI = 27k@ Vref = 200mV,
RC = 300k, TA = +25°C ; all voltages referenced to Analog GND, Pin1, unless
otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
LinearityOutput Reading
Stability Output Reading
Symmetry Output Reading
VDD = 5V,
VEE = 5V,
Note 2
Vref = 2.000V
Vref = 200.0mV
VDD = 5V, VEE = 5V, VX = 199mV,
Vref = 200mV
VDD = 5V, VEE = 5V, Vref = 2000mV,
Note 3
0.05
Count
±0.05
±0.05
+0.05 %rdg
+ Count
%rdg
3 LSD
– – 4 LSD
ZeroOutput Reading
Bias Current
Analog Input
Reference Input
VDD = 5V, VEE = 5V, VX = 0V, Vref = 2V
VDD = 5V, VEE = 5V
0 0 LSD
±20
±100
pA
±20 ±100 pA
Analog GND
±20 ±500 pA
Common Mode Rejection
Input Voltage (Pin9, Pin10)
0Level
1Level
Output Voltage (Pin14 to Pin23)
0Level
1Level
Output Current (Pin14 to Pin23)
Source
Sink
Input Current (DU, Pin9)
Quiescent Current
DC Supply Rejection
VDD = 5V, VEE = 5V, fClk = 32kHz,
VX = 1.4V, Vref = 2V
65 dB
VIL VDD = 5V, VO = 4.5V or 0.5V, Note 3
VDD = 10V, VO = 9V or 1V, Note 3
VDD = 15V, VO = 13.5V or 1.5V, Note 3
VIH VDD = 5V, VO = 0.5V or 4.5V, Note 3
VDD = 10V, VO = 1V or 9V, Note 3
VDD = 15V, VO = 1.5V or 13.5V, Note 3
2.25
4.50
6.75
3.5 2.75
7.0 5.50
11.0 8.25
1.5 V
3.0 V
4.0 V
V
V
V
VOL
VOH
VSS = 0V
VSS = 5V
VSS = 0V
VSS = 5V
VDD = 5V, VEE = 5V
4.95
4.95
0
5.0
5.0
5.0
0.05
4.95
V
V
V
V
IOH VDD = 5V, VSS = 0V, VOH = 4.6V
VEE = 5V VSS = 5V, VOH = 4.5V
0.2
0.5
0.36
0.9
mA
mA
IOL
VSS = 0V, VOL = 0.4V
0.51 0.88
mA
VSS = 5V, VOL = 4.5V
1.3 2.25
mA
IDU VDD = 5V, VEE = 5V
±0.00001 ±0.3 µA
IQ VDD to VEE, VDD = 5V, VEE = 5V
ISS = 0
VDD = 8V, VEE = 8V
0.9 2.0 mA
1.8 4.0 mA
VDD = 5V, VEE = 5V, VDD to VEE, ISS = 0,
0.5
mV/V
Vref = 2V
Note
Note
Note
2. Accuracy The accuracy of the meter at full scale is the accuracy of the setting of the reference volt-
age. Zero is recalculated during each conversion cycle. The meaningful specification is linearity.
In other words, the deviation from correct reading for all inputs other than positive full scale and zero
is defined as the linearity specification.
3. Symmetry Defined as the difference between a negative and positive reading of the same voltage
at or near full scale.
4. Referenced to VSS for Pin9. Referenced to VEE for Pin10.





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