EIA-232-D/V.28 driver/receiver. MC145406 Datasheet

MC145406 driver/receiver. Datasheet pdf. Equivalent


Philips MC145406
Philips Semiconductors Linear Products
EIA-232-D/V.28 driver/receiver
Product specification
MC145406
DESCRIPTION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers
and 3 receivers to fulfill the electrical specifications of standards
EIA-232-D and CCITT V.28. The drivers feature true TTL input
compatibility, slew-rate limited output, 300power-off source
impedance, and output typically switching to within 25% of the
supply rails. The receivers can handle up to +25V while presenting
3 to 7kimpedance. Hysteresis in the receiver aids reception of
noisy signals. By combining both drivers and receivers in a single
CMOS chip, the MC145406 provides efficient, low-power solutions
for EIA-232-D and V.28 applications.
APPLICATIONS
Modem interface
Voice/data telephone interface
Lap-top computers
UART interface
FEATURES
Drivers
+5 to +12V supply range
300power-off source impedance
Output current limiting
TTL compatible
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Dual In-Line (DIP) Package
16-Pin Small Outline Large (SOL) Package
PIN CONFIGURATION
D and N Packages
VDD 1
RX1
TX1
2
3
RX2 4
TX2 5
RX3 6
TX3 7
VSS 8
R
D
R
D
R
D
16 VCC
15 DO1
14 DI1
13 DO2
12 DI2
11 DO3
10 DI3
9 GND
NOTE:
D = Driver
R = Receiver
Maximum slew rate = 30V/µs
Receivers
+25V input voltage range over the full supply range
3 to 7kinput impedance
Hysteresis on input switchpoint
General
Very low supply currents for long battery life
Operation is independent of power supply sequencing
TEMPERATURE RANGE
0 to +70°C
0 to +70°C
ORDER CODE
MC145406N
MC145406D
DWG #
0406C
0171B
ABSOLUTE MAXIMUM RATINGS
SYMBOL
VCC
VDD
VSS
VIR
PD
TA
TSTG
θJA
PARAMETER
Supply voltage
Supply voltage
Supply voltage
Input voltage range
RX1-3 inputs
DI1-3 inputs
DC current per pin
Power dissipation (package)
Operating temperature range
Storage temperature range
Thermal impedance N package
D package
RATING
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
(VSS - 15) to (VDD + 15)
-0.5 to (VCC + 0.5)
+100
1.0
0 to +70
-65 to +150
80
105
UNITS
V
V
V
V
mA
W
°C
°C
°C/W
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO
< VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX).
August 31, 1994
467 853-1430 13721


MC145406 Datasheet
Recommendation MC145406 Datasheet
Part MC145406
Description EIA-232-D/V.28 driver/receiver
Feature MC145406; Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver MC145.
Manufacture Philips
Datasheet
Download MC145406 Datasheet




Philips MC145406
Philips Semiconductors Linear Products
EIA-232-D/V.28 driver/receiver
Product specification
MC145406
BLOCK DIAGRAM
RECEIVER
VCC
15k
RX +
5.4k
VSS
VCC
1.0V
VDD
300
TX
DRIVER
LEVEL
SHIFT
HYSTERESIS
VCC
+
1.8V
1.4V
DO
DI
VSS
PIN #
1
8
16
9
2, 4, 6
11, 13, 15
10, 12, 14
3, 5, 7
SYMBOL
PIN DESCRIPTION
VDD
VSS
VCC
GND
Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts.
Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts.
Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V).
Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7)
as well as to the logic power supply ground.
RX1, RX2, RX3
DO1, DO2, DO3
Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to
-25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing
to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to VCC.
The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis
for noise rejection. The nominal input impedance is 5k. An open or grounded input pin is interpreted as a mark,
forcing the DO pin to VCC.
Data Output. These are the receiver digital output pins, which swing from VCC to GND. A space on the RX
pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one
LSTTL input load.
DI1, DI2, DI3
TX1, TX2, TX3
Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished
by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well.
Input voltage levels on these pins must be between VCC and GND.
Transmit Data Output. These are the EIA-232-D transmit signal output pins, which swing toward VDD and VSS.
A logic one at a DI input causes the corresponding TX output to swing toward VSS. A logic zero causes the
output to swing toward VDD (the output voltages will be slightly less than VDD or VSS depending upon the output
load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (VDD = VSS = VCC
= GND), the minimum output impedance is 300.
August 31, 1994
468



Philips MC145406
Philips Semiconductors Linear Products
EIA-232-D/V.28 driver/receiver
Product specification
MC145406
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
VCC Supply voltage
VDD Supply voltage
VSS Supply voltage
Input voltage range
VIR RX1-3 inputs
DI1-3 inputs
DC current per pin
PD Power dissipation (package)
TA Operating temperature range
TSTG
θJA
Storage temperature range
Thermal impedance N package
D package
RATING
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
(VSS - 15) to (VDD + 15)
-0.5 to (VCC + 0.5)
+100
1.0
0 to +70
-65 to +150
80
105
UNITS
V
V
V
V
mA
W
°C
°C
°C/W
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO
< VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX).
DC ELECTRICAL CHARACTERISTICS
Typical values are at TA = 0 to 70°C; GND = 0V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
DC supply voltage
VDD
VSS
VCC
Quiescent supply current (outputs unloaded, inputs low)
IDD
ISS
ICC
VDD = +12V
VSS = -12V
VCC = +5V
LIMITS
UNITS
MIN TYP MAX
4.5
5 to 12
13.2
-4.5 -5 to -12 -13.2
4.5 5.0 5.5
V
V
V
20 400 µA
280 600 µA
260 450 µA
RECEIVER ELECTRICAL CHARACTERISTICS
Typical values are at TA = 0 to 70°C; GND = 0V; VDD = +5 to +12V; VSS = -5 to -12V; VCC = +5V +5%, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN TYP MAX
VON
VOFF
VON-VOFF
RIN
VOH
Input turn-on threshold
Input turn-off threshold
Input threshold hysteresis
Input resistance
High level output voltage
VRX1-3 = -3V to (VSS-15V)1
RX1-3
RX1-3
RX1-3
RX1-3
DO1-3
VOL
Low level output voltage
DO1-3
VRX1-3 = +3V to (VDD+15V)1
VDO1-3 = VOL, VCC = 5.0V +5%
VDO1-3 = VOH, VCC = 5.0V +5%
VCC = 5.0V +5%
(VSS-15V) < VRX1-3 < (VDD+15V)
IOH = -20µA, VCC = +5.0V
IOH = -1mA, VCC = +5.0V
IOL = +20µA, VCC = +5.0V
IOL = +2mA, VCC = +5.0V
IOL = +4mA, VCC = +5.0V
1.35
0.75
0.6
3.0
4.9
3.8
1.80
1.00
0.8
5.0
5.0
4.4
0.005
0.15
0.3
2.35
1.25
7.0
0.1
0.5
0.7
NOTE:
1. This is the range of input voltages as specified by EIA-232-D to cause a receiver to be in the high or low logic state.
UNITS
V
V
V
k
V
V
August 31, 1994
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