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Flash Memories. NAND01G-A Datasheet

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Flash Memories. NAND01G-A Datasheet
















NAND01G-A Memories. Datasheet pdf. Equivalent













Part

NAND01G-A

Description

128 Mbit / 256 Mbit / 512 Mbit / 1 Gbit (x8/x16) 528 Byte/264 Word Page / 1.8V/3V / NAND Flash Memories



Feature


NAND128-A, NAND256-A NAND512-A, NAND01G- A 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3 V, NAND Flash Memories FEATURES SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH DENSITY NA ND FLASH MEMORIES – Up to 1 Gbit memo ry array – Up to 32 Mbit spare area Cost effective solutions for mass st orage applications NAND INTERFACE – x8 or x16 bus .
Manufacture

STMicroelectronics

Datasheet
Download NAND01G-A Datasheet


STMicroelectronics NAND01G-A

NAND01G-A; width – Multiplexed Address/ Data – Pinout compatibility for all densities SUPPLY VOLTAGE – 1.8V device: VDD = 1 .7 to 1.95V – 3.0V device: VDD = 2.7 to 3.6V PAGE SIZE – x8 device: (512 + 16 spare) Bytes – x16 device: (256 + 8 spare) Words BLOCK SIZE – x8 devic e: (16K + 512 spare) Bytes – x16 devi ce: (8K + 256 spare) Words PAGE READ / PROGRAM – Random access: 12µs (max.


STMicroelectronics NAND01G-A

) – Sequential access: 50ns (min) – Page program time: 200µs (typ) COPY BA CK PROGRAM MODE – Fast page copy with out external buffering FAST BLOCK ERASE – Block erase time: 2ms (Typ) STATUS REGISTER ELECTRONIC SIGNATURE CHIP ENA BLE ‘DON’T CARE’ OPTION – Simpl e interface with microcontroller SERIAL NUMBER OPTION HARDWARE DATA PROTECTION – Program/Erase locked during Powe.


STMicroelectronics NAND01G-A

r transitions Figure 1. Packages TSOP4 8 12 x 20mm WSOP48 12 x 17 x 0.65mm F BGA VFBGA55 8 x 10 x 1mm TFBGA55 8 x 1 0 x 1.2mm VFBGA63 8.5 x 15 x 1mm TFBGA6 3 8.5 x 15 x 1.2mm ■ ■ ■ DATA INTEGRITY – 100,000 Program/Erase cy cles – 10 years Data Retention RoHS C OMPLIANCE – Lead-Free Components are Compliant with the RoHS Directive DEVEL OPMENT TOOLS – Error Correctio.





Part

NAND01G-A

Description

128 Mbit / 256 Mbit / 512 Mbit / 1 Gbit (x8/x16) 528 Byte/264 Word Page / 1.8V/3V / NAND Flash Memories



Feature


NAND128-A, NAND256-A NAND512-A, NAND01G- A 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3 V, NAND Flash Memories FEATURES SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH DENSITY NA ND FLASH MEMORIES – Up to 1 Gbit memo ry array – Up to 32 Mbit spare area Cost effective solutions for mass st orage applications NAND INTERFACE – x8 or x16 bus .
Manufacture

STMicroelectronics

Datasheet
Download NAND01G-A Datasheet




 NAND01G-A
NAND128-A, NAND256-A
NAND512-A, NAND01G-A
128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16)
528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
FEATURES SUMMARY
HIGH DENSITY NAND FLASH MEMORIES
– Up to 1 Gbit memory array
– Up to 32 Mbit spare area
– Cost effective solutions for mass storage
applications
NAND INTERFACE
– x8 or x16 bus width
– Multiplexed Address/ Data
– Pinout compatibility for all densities
SUPPLY VOLTAGE
– 1.8V device: VDD = 1.7 to 1.95V
– 3.0V device: VDD = 2.7 to 3.6V
PAGE SIZE
– x8 device: (512 + 16 spare) Bytes
– x16 device: (256 + 8 spare) Words
BLOCK SIZE
– x8 device: (16K + 512 spare) Bytes
– x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM
– Random access: 12µs (max)
– Sequential access: 50ns (min)
– Page program time: 200µs (typ)
COPY BACK PROGRAM MODE
– Fast page copy without external buffering
FAST BLOCK ERASE
– Block erase time: 2ms (Typ)
STATUS REGISTER
ELECTRONIC SIGNATURE
CHIP ENABLE ‘DON’T CARE’ OPTION
– Simple interface with microcontroller
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
– Program/Erase locked during Power
transitions
Figure 1. Packages
TSOP48 12 x 20mm
WSOP48 12 x 17 x 0.65mm
FBGA
VFBGA55 8 x 10 x 1mm
TFBGA55 8 x 10 x 1.2mm
VFBGA63 8.5 x 15 x 1mm
TFBGA63 8.5 x 15 x 1.2mm
DATA INTEGRITY
– 100,000 Program/Erase cycles
– 10 years Data Retention
RoHS COMPLIANCE
– Lead-Free Components are Compliant
with the RoHS Directive
DEVELOPMENT TOOLS
– Error Correction Code software and
hardware models
– Bad Blocks Management and Wear
Leveling algorithms
– File System OS Native reference software
– Hardware simulation models
December 2004
1/55




 NAND01G-A
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Table 1. Product List
Reference
NAND128-A
NAND256-A
NAND512-A
NAND01G-A
Part Number
NAND128R3A
NAND128W3A
NAND128R4A
NAND128W4A
NAND256R3A
NAND256W3A
NAND256R4A
NAND256W4A
NAND512R3A
NAND512W3A
NAND512R4A
NAND512W4A
NAND01GR3A
NAND01GW3A
NAND01GR4A
NAND01GW4A
2/55




 NAND01G-A
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Logic Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. TSOP48 and WSOP48 Connections, x8 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. TSOP48 and WSOP48 Connections, x16 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. FBGA55 Connections, x8 devices (Top view through package) . . . . . . . . . . . . . . . . . . . 11
Figure 7. FBGA55 Connections, x16 devices (Top view through package) . . . . . . . . . . . . . . . . . . 12
Figure 8. FBGA63 Connections, x8 devices (Top view through package) . . . . . . . . . . . . . . . . . . . 13
Figure 9. FBGA63 Connections, x16 devices (Top view through package) . . . . . . . . . . . . . . . . . . 14
MEMORY ARRAY ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bad Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4. Valid Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10.Memory Array Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Inputs/Outputs (I/O0-I/O7). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Inputs/Outputs (I/O8-I/O15). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Address Latch Enable (AL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Command Latch Enable (CL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chip Enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Read Enable (R). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write Enable (W). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write Protect (WP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Ready/Busy (RB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
VDD Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
VSS Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
BUS OPERATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Command Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Address Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Write Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 5. Bus Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6. Address Insertion, x8 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3/55




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