NDS9933A
January 1999
NDS9933A
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
This P-Chan...
NDS9933A
January 1999
NDS9933A
Dual P-Channel Enhancement Mode Field Effect
Transistor
General Description
This P-Channel enhancement mode power field effect
transistor is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage apllications such as DC motor control and DC/ DC conversion where fast switching,low in-line power loss, and resistance to transients are needed.
Features
-2.8 A, -20 V. RDS(on) = 0.14 Ω @ VGS = -4.5 V RDS(on) = 0.19 Ω @ VGS = -2.7 V RDS(on) = 0.20 Ω @ VGS = -2.5 V.
High density cell design for extremely low RDS(on). High power and current handling capability in a
widely used surface mount package.
Dual MOSFET in surface mount package.
D2 D1 D1
D2
5 6 4 3 2 1
G1 SO-8 S1 G1 S2
7 8
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
TA = 25°C unless otherwise noted
Parameter
NDS9933A
-20
(Note 1a)
Units
V V A W
±8 -2.8 -10 2
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
1.6 1 0.9 -55 to +150 °C
TJ, Tstg
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
°C/W °C/W...