Dual N & P-Channel Enhancement Mode Field Effect Transistor
These dual N- and P-channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices are
particularly suited for low voltage applications such as
notebook computer power management and other
battery powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
N-Channel 3.7A, 30V, RDS(ON)=0.08Ω @ VGS=10V.
P-Channel -2.9A, -30V, RDS(ON)=0.13Ω @ VGS=-10V.
High density cell design or extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
Absolute Maximum Ratings
TA= 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation (Note 1a)
TJ,TSTG Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Fairchild Semiconductor Corporation
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