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NDS9956A Dataheets PDF



Part Number NDS9956A
Manufacturers Fairchild
Logo Fairchild
Description Dual N-Channel MOSFET
Datasheet NDS9956A DatasheetNDS9956A Datasheet (PDF)

February 1996 NDS9956A Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage a.

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February 1996 NDS9956A Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as DC/DC conversion and DC motor control where fast switching, low in-line power loss, and resistance to transients are needed. Features 3.7A, 30V. RDS(ON) = 0.08Ω @ VGS = 10V High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ________________________________________________________________________________ 5 4 3 2 1 6 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed T A= 25°C unless otherwise noted NDS9956A 30 ± 20 (Note 1a) Units V V A ± 3.7 ± 15 2 Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) W 1.6 1 0.9 -55 to 150 °C TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W © 1997 Fairchild Semiconductor Corporation NDS9956A.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate - Body Leakage, Forward Gate - Body Leakage, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Conditions VGS = 0 V, ID = 250 µA VDS = 24 V, VGS = 0 V TJ = 55°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 µA TJ = 125°C VGS = 10 V, ID = 2.2 A TJ = 125°C VGS = 4.5 V, ID = 1.0 A TJ = 125°C ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 10 V, ID = 3.7 A, VGS = 10 V VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 Ω VGS = 10 V, VDS = 10 V VGS = 4.5 V, VDS = 10 V VDS = 15 V, ID = 3.7 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS 320 225 85 10 13 21 5 9.5 1.5 3.3 20 20 50 50 27 pF pF pF ns ns ns ns nC nC nC 15 3.5 6 S 1 0.7 1.7 1.2 0.06 0.08 0.08 0.11 Min 30 2 25 100 -100 2.8 2.2 0.08 0.13 0.11 0.18 A Typ Max Units V µA µA nA nA V OFF CHARACTERISTICS ON CHARACTERISTICS (Note 2) Ω SWITCHING CHARACTERISTICS (Note 2) NDS9956A.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol IS VSD trr Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Parameter Conditions Min Typ Max 1.2 Units A V ns DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time VGS = 0 V, IS = 1.25 A (Note 2) 0.8 1.3 100 VGS = 0 V, IF = 1.25 A, dIF/dt = 100 A/µs PD(t ) = R θJ A (t ) T J −TA = R θJ C +RθCA(t ) T J −TA = I2 D (t ) × RDS (ON ) TJ Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz cpper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS9956A.SAM Typical Electrical Characteristics 20 VGS =10V 8.0 3 6.0 DRAIN-SOURCE ON-RESISTANCE , DRAIN-SOURCE CURRENT (A) 5.0 4.5 R DS(on) , NORMALIZED 15 VGS = 3.5V 2.5 4.0 2 10 4.0 4.5 1.5 5.0 6.0 8.0 10 3.5 5 1 3.0 0 0 1 2 VDS , DRAIN-SOURCE VOLTAGE (V) 3 I D 0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 15 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1.6 2 DRAIN-SOURCE ON-RESISTANCE 1.4 R DS(on) , NORMALIZED R DS(ON), NORMALIZED V G S = 10V DRAIN-SOURCE ON-RESISTANCE I D = 3.7A VGS = 10 V 1.5 1.2 TJ = 125°C 1 25°C 1 0.8 -55°C 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 15 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. 10 GATE-SOURCE THRESHOLD VOLTAGE 1.2 V DS = 10V 8.


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