DatasheetsPDF.com

NDT3055L Dataheets PDF



Part Number NDT3055L
Manufacturers Fairchild
Logo Fairchild
Description N-Channel MOSFET
Datasheet NDT3055L DatasheetNDT3055L Datasheet (PDF)

August 1998 NDT3055L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are particularly suited.

  NDT3055L   NDT3055L



Document
August 1998 NDT3055L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. Features 4 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V, RDS(ON) = 0.120 Ω @ VGS = 4.5 V. Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D D D D S D SOT-223 S G D S G SOT-223* (J23Z) G G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage TA = 25oC unless otherwise noted NDT3055L 60 ±20 (Note 1a) Units V V A Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1c) 4 25 3 1.3 1.1 -65 to 150 W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 42 12 °C/W °C/W * Order option J23Z for cropped center drain lead. © 1998 Fairchild Semiconductor Corporation NDT3055L Rev.A1 Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25 C VDS = 60 V, VGS = 0 V TJ =125°C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse (Note 2) o 60 55 1 50 100 -100 V mV/o C µA µA nA nA ∆BVDSS/∆TJ IDSS VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25 oC VGS = 10 V, ID = 4 A TJ =125°C VGS = 4.5 V, ID = 3.7 A 1 1.6 -4 0.07 0.125 0.103 10 7 ON CHARACTERISTICS Gate Threshold Voltage Gate Threshold Voltage Temp. Coefficient Static Drain-Source On-Resistance 2 V mV /oC ∆VGS(th)/∆TJ RDS(ON) 0.1 0.18 0.12 Ω ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD Notes: On-State Drain Current Forward Transconductance VGS = 5 , VDS = 10 V VDS = 5 V, ID = 4 A VDS = 25, VGS = 0 V, f = 1.0 MHz A S DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 345 110 30 pF pF pF SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 40 V, ID = 4 A, VGS = 10 V VDD = 25, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 5 7.5 20 7 13 1.7 3.2 20 20 50 20 20 ns ns ns ns nC nC nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.5 A (Note 2) 2.5 0.8 1.2 A V 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of guaranteed by design while RθCA is determined by the user's board design. the drain pins. RθJC is a. 42oC/W when mounted on a 1 in2 pad of 2oz Cu. b. 95oC/W when mounted on a pad of 2oz Cu. 0.066 in2 c. 110oC/W when mounted on a 0.00123 in2 pad of 2oz Cu. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% NDT3055L Rev.A1 Typical Electrical Characteristics 25 I D , DRAIN-SOURCE CURRENT (A) 2 6.0V 4.5V R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS= 10V 20 5.0V 1.8 VGS = 4.0V 1.6 1.4 1.2 1 0.8 15 4.5V 5.0V 6.0V 8.0V 10V 4.0V 10 3.5V 5 3.0V 0 0 1 2 3 4 5 0 5 VDS , DRAIN-SOURCE VOLTAGE (V) 10 15 I D, DRAIN CURRENT (A) 20 25 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 DRAIN-SOURCE ON-RESISTANCE 1.6 1.4 1.2 1 0.8 0.6 -50 R DS(ON) , ON-RESISTANCE (OHM) 0.28 I D = 4.0 A VGS = 10 V I D = 2A 0.24 0.2 0.16 R DS(ON), NORMALIZED TA = 125°C 0.12 0.08 25°C 0.04 0 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ , JUNCTION TEMPERATURE (°C) V GS , GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to- Source Voltage. 10 IS , REVERSE DRAIN CURRENT (A) 30 VDS = 5V ID , DRAIN CURRENT (A) 8 TJ = -55°C 25°C 125°C 10 V GS = 0V 1 TA = 125°C 25°C -55°C 6 0.1 0.01 4 2 0.001 0.0001 0 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.2.


NDT3055 NDT3055L NDT410EL


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)