P-Channel Enhancement Mode Field Effect Transistor
Power SOT P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and DC motor
-5A, -30V. RDS(ON) = 0.065Ω @ VGS = -10V
RDS(ON) = 0.1Ω @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Absolute Maximum Ratings TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Maximum Power Dissipation
TJ,TSTG Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
© 1997 Fairchild Semiconductor Corporation
-65 to 150
NDT452AP Rev. B1