P50N02LD

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor D P50N02LD TO-252 (D PAK) PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 12mΩ ID 55A G S 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 55 38 150 36 250 8.6 80 41 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM IAR A L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 °C SYMBOL RθJC RθJA RθCS TYPICAL MAXIMUM 2.5 65 UNITS °C / W 0.7 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1％ ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TC = 125 °C 25 0.8 1.2 2.5 ±250 25 250 nA µA V LIMITS UNIT MIN TYP MAX 1 MAY-24-2001 NIKO-SEM 1 N-Channel Logic Level Enhancement Mode Field Effect Transistor ID(ON) RDS(ON) 1 P50N02LD TO-252 (D PAK)...