PSMN005-55P

DISCRETE SEMICONDUCTORS DATA SHEET PSMN005-55B; PSMN005-55P N-channel logic level TrenchMOS(TM) transistor Product specification October 1999 Philips Semiconductors N-channel logic level TrenchMOS(TM) transistor Product specification PSMN005-55B; PSMN005-55P FEATURES ’Trench’ technology Very low on-state resistance Fast switching Low thermal resistance SYMBOL d g s QUICK REFERENCE DATA VDSS = 55 V ID = 75 A RDS(ON) ≤ 5.8 mΩ (VGS = 10 V) RDS(ON) ≤ 6.3 mΩ (VGS = 5 V) GENERAL DESCRIPTION SiliconMAX products use the latest Philips Trench technology to achieve the lowest possible on-state resistance in each package at each voltage rating. Applications: d.c. to d.c. converters switched mode power supplies The PSMN005-55P is supplied in the SOT78 (TO220AB) conventional leaded package. The PSMN005-55B is supplied in the SOT404 surface mounting package. PINNING SOT78 (TO220AB) SOT404 (D2PAK) PIN DESCRIPTION 1 gate tab tab 2 drain1 3 source tab drain 1 23 2 13 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS VDSS VDGR VGS VGSM ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Continuous gate-source voltage Peak pulsed gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Tj ≤ 150 ˚C Tmb = 25 ˚C; VGS = 5 V Tmb = 100 ˚C; VGS = 5 V Tmb = 25 ˚C Tmb ...