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SA1638BE Dataheets PDF



Part Number SA1638BE
Manufacturers Philips
Logo Philips
Description Low voltage IF I/Q transceiver
Datasheet SA1638BE DatasheetSA1638BE Datasheet (PDF)

INTEGRATED CIRCUITS SA1638 Low voltage IF I/Q transceiver Product specification IC17 Data Handbook 1997 Sept 03 Philips Semiconductors Philips Semiconductors Product specification Low voltage IF I/Q transceiver SA1638 DESCRIPTION The SA1638 is a combined Rx and Tx IF I/Q circuit. The receive path contains an IF amplifier, a pair of quadrature down-mixers, and a pair of baseband filters and amplifiers. A second pair of mixers in the transmit path transposes a quadrature baseband input up t.

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INTEGRATED CIRCUITS SA1638 Low voltage IF I/Q transceiver Product specification IC17 Data Handbook 1997 Sept 03 Philips Semiconductors Philips Semiconductors Product specification Low voltage IF I/Q transceiver SA1638 DESCRIPTION The SA1638 is a combined Rx and Tx IF I/Q circuit. The receive path contains an IF amplifier, a pair of quadrature down-mixers, and a pair of baseband filters and amplifiers. A second pair of mixers in the transmit path transposes a quadrature baseband input up to the IF frequency. An external VCO signal is divided down internally and buffered to provide quadrature local oscillator signals for the mixers. A further divider chain, reference divider and phase detector are provided to avoid the need for an external IF synthesizer. Rx or Tx path or the entire circuit may be powered down by logic inputs. On-board voltage regulators are provided to allow direct connection to a battery supply. • High performance on-board integrated receive filters with bandwidth tunable between 50-850 kHz • Switchable alternative bandwidth setting available to allow channel bandwidth flexibility in operation • Designed for a widely used I and Q baseband GSM interface • Control registers power up in a default state • Optional DC offset trim capability to <200mV • Only a standard reference input frequency required, choice of 13, 26, 39 or 52MHz FEATURES • Fully compatible with SA1620 GSM RF front-end (see Figure 9) APPLICATIONS • Direct supply: 3.3V to 7.5V • Two DC regulators giving 3.0V output • Low current consumption: 18mA for Rx or 22mA for Tx • Input/output IF frequency from 70-400 MHz • Internal IF PLL for synthesizing the local oscillator signal PIN CONFIGURATION • IF circuitry for GSM 900MHz hand-held units • IF circuitry for PCN (DCS1800) hand-held units • Quadrature up and down mixer stage LQFP Package GNDREG1 TxIFOUTX TxIFOUT RxIF INX VccTxRx PONPLL RxIF IN VccCP GND1 GND2 GND3 48 47 46 45 44 43 42 VREG1 VREGF2 VREG2 GNDREG2 PON VBATT AOUT BOUT DCRES RESD RESA RESB 1 2 3 4 5 6 7 8 9 10 11 12 41 40 39 38 37 36 35 34 33 32 31 VEECP IREF LO INX LO IN ADJ IN CLK IN CLK INX LOCK STROBE CLOCK DATA VEEDIG 48–pin LQFP CP 30 29 28 27 26 25 VccDIG 13 14 15 16 17 18 19 20 21 22 23 24 QTx INX QTx IN QRxOUT IRxOUT QRxOUTX IRxOUTX PONRx ITx INX ITx IN VREF PDTx SR00524 Figure 1. SA1638 Pin Configuration ORDERING INFORMATION DESCRIPTION 48-Pin Thin Quad Flat Pack (LQFP) TEMPERATURE RANGE -40 to +85°C ORDER CODE SA1638BE DWG # SOT313-2 1997 Sept 03 2 853-1818 18351 Philips Semiconductors Product specification Low voltage IF I/Q transceiver SA1638 BLOCK DIAGRAM GNDREG1 GNDREG2 VREGF2 V BATT VREG1 PONRx BIAS RX V REF PDTx BIAS TX ITx INX ITx IN V.REG.1 V.REG.2 TxIFOUT TxIFOUTX VREG2 RESD RESA RESB PON QTx IN VCCTxRx QTx INX GND3 IRxOUT GND1 RxIF IN IRxOUTX RxIF INX GND2 IF AMP QRxOUT QRxOUTX LO IN LO INX ÷2 DC BUFFERS ADJUST STATUS REGISTER DCRES AOUT BOUT ADJ IN LOCK CP IREF PONPLL VCCCP VEECP ÷N DC REGISTER CHARGE PUMP PHASE DETECTOR TEST REGISTER ÷ 13, 26 39, 52 SYNTH REGISTER SERIAL INPUT DIG DIG DATA CLK INX CLOCK CLK IN V CC V EE STROBE SR00525 Figure 2. SA1638 Block Diagram 1997 Sept 03 3 Philips Semiconductors Product specification Low voltage IF I/Q transceiver SA1638 PIN DESCRIPTIONS Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name VREG1 VREGF2 VREG2 GNDREG2 PON VBATT AOUT BOUT DCRES RESD RESA RESB PONRx VREF QRxOUT QRxOUTX IRxOUT IRxOUTX QTx IN QTx INX ITx IN ITx INX PDTx VCCDIG VEEDIG DATA CLOCK STROBE LOCK CLK INX CLK IN ADJ IN LO IN LO INX IREF VEECP CP VCCCP POnPLL GND3 TxIFOUTX TxIFOUT GND2 RxIF INX RxIF IN GND1 VCCTxRx GNDREG1 Output voltage of regulator 1 Feedback of regulator 2 Output voltage of regulator 2 Ground of regulator 2 Power-on input for voltage regulators 1 and 2 (active high) Input voltage for regulators 1 and 2 Programmable logic output (see Figure 9) Programmable logic output (see Figure 9) Reference current setting resistor for DC offset circuit Additional external current defining resistor for filters Principal external current defining resistor for filters Principal external current defining resistor for filters Power-on input for Rx (active high) Reference voltage Differential receive baseband output Differential receive baseband output Differential receive baseband output Differential receive baseband output Differential transmit baseband input Differential transmit baseband input Differential transmit baseband input Differential transmit baseband input Power-on for transmitter (active low) Digital circuit supply Digital ground Serial bus data input Serial bus clock input Serial bus strobe input Test control/synthesizer lock indicator Differential reference divider input Differential reference divider input Used for test only. Do not connect Differential LO input Differential LO input Referenc.


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