SN74LS174 SCHOTTKY Datasheet

SN74LS174 Datasheet, PDF, Equivalent


Part Number

SN74LS174

Description

LOW POWER SCHOTTKY

Manufacture

ON Semiconductor

Total Page 8 Pages
Datasheet
Download SN74LS174 Datasheet


SN74LS174
SN74LS174
Hex D Flip-Flop
The LSTTL / MSI SN74LS174 is a high speed Hex D Flip-Flop. The
device is used primarily as a 6-bit edge-triggered storage register. The
information on the D inputs is transferred to storage during the LOW
to HIGH clock transition. The device has a Master Reset to
simultaneously clear all flip-flops. The LS174 is fabricated with the
Schottky barrier diode process for high speed and is completely
compatible with all ON Semiconductor TTL families.
Edge-Triggered D-Type Inputs
Buffered-Positive Edge-Triggered Clock
Asynchronous Common Reset
Input Clamp Diodes Limit High Speed Termination Effects
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
TA Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0 25 70 °C
IOH Output Current – High
IOL Output Current – Low
– 0.4
8.0
mA
mA
http://onsemi.com
LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
Package
Shipping
SN74LS174N 16 Pin DIP 2000 Units/Box
SN74LS174D
16 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Publication Order Number:
SN74LS174/D

SN74LS174
SN74LS174
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC Q5 D5 D4 Q4 D3 Q3 CP
16 15 14 13 12 11 10 9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
123
MR Q0 D0
4 56
D1 Q1 D2
78
Q2 GND
PIN NAMES
D0 – D5
CP
MR
Q0 – Q5
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOADING (Note a)
HIGH
LOW
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
LOGIC SYMBOL
3 4 6 11 13 14
D0 D1 D2 D3 D4 D5
9 CP
1 MR
Q0 Q1 Q2 Q3 Q4 Q5
2 5 7 10 12 15
VCC = PIN 16
GND = PIN 8
MR CP D5
1 9 14
LOGIC DIAGRAM
D4 D3 D2
13 11 6
D1
4
D0
3
DQ
CPCD
15
Q5
DQ
CPCD
DQ
CPCD
DQ
CPCD
12 10
Q4 Q3
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
7
Q2
DQ
CPCD
5
Q1
DQ
CPCD
2
Q0
http://onsemi.com
2


Features SN74LS174 Hex D Flip-Flop The LSTTL / MS I SN74LS174 is a high speed Hex D Flip- Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is tra nsferred to storage during the LOW to H IGH clock transition. The device has a Master Reset to simultaneously clear al l flip-flops. The LS174 is fabricated w ith the Schottky barrier diode process for high speed and is completely compat ible with all ON Semiconductor TTL fami lies. http://onsemi.com • • • Edge-Triggered D-Type Inputs Buffer ed-Positive Edge-Triggered Clock Asynch ronous Common Reset Input Clamp Diodes Limit High Speed Termination Effects L OW POWER SCHOTTKY GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Tempe rature Range Output Current – High Ou tput Current – Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 – 0.4 8.0 Unit V °C mA mA 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Device SN74LS174N SN74LS17.
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