28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY
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PRELIMINARY
28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY
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Extended Cycling Capability 100...
Description
E
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PRELIMINARY
28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY
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Extended Cycling Capability 100,000 Block Erase Cycles Automated Byte Write and Block Erase Industry-Standard Command User Interface Status Registers Erase Suspend Capability SRAM-Compatible Write Interface Reset/Deep Power-Down Input 0.2 µA ICC Typical Provides Reset for Boot Operations Industry-Standard Surface Mount Packaging 40-Lead TSOP 44-Lead PSOP 40-Lead PDIP ETOX™ IV Flash Technology 5V Read 12V Write and Block Erase VPP = 12V ±5% Standard VPP = 12V ±10% Option Independent Software Vendor Support
High Performance Read 80/120 ns Max Access Time 40 ns Max. Output Enable Time Low Power Consumption 20 mA Typical Read Current x8-Only Input/Output Architecture Space-Constrained 8-bit Applications Optimized Array Blocking Architecture One 16-KB Protected Boot Block Two 8-KB Parameter Blocks One 96-KB Main Block One 128-KB Main Block Top Boot Location Hardware Data Protection Feature Erase/Write Lockout during Power Transitions Absolute Hardware Protection for Boot Block Software EEPROM Emulation with Parameter Blocks
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Intel’s 2-Mbit flash memory is an extension of the Boot Block architecture which includes block-selective erasure, automated write and erase operations, and a standard microprocessor interface. The 2-Mbit flash memory enhances the Boot Block architecture by adding more density and blocks, x8 input/output control, very h...
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