29F52

29F5229F53 8-Bit Registered Transceiver April 1988 Revised August 1999 29F5229F53 8-Bit Registered Transceiver General Description The 29F52 and 29F53 are 8-bit registered transceivers. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The A0–A7 output pins are guaranteed to sink 24 mA while the B0–B7 output pins are designed for 64 mA. The 29F53 is an inverting option of the 29F52. Both transceivers are AMD Am2952/2953 functional equivalents. Features s 8-bit registered transceivers s Separate clock, clock enable and 3-STATE output enable provided for each register s AMD Am2952/2953 functional equivalents s Both inverting and non-inverting options available s 24-Pin slimline package Ordering Code: Order Number 29F52SC 29F52SPC 29F53SPC Package Number M24B N24C N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols 29F52 29F53 IEEE/IEC 29F52 IEEE/IEC 29F53 © 1999 Fairchild Semiconductor Corporation DS009606 www.fairchildsemi.com 29F5229F53 Connection Diagrams Pin Assignment for DIP and SOIC 29F52 Pin Assignment for ...