74F20

74F20 Dual 4-Input NAND Gate April 1988 Revised July 1999 74F20 Dual 4-Input NAND Gate General Description This device contains two independent gates, each of which performs the logic NAND function. Ordering Code: Order Number 74F20SC 74F20SJ 74F20PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Unit Loading/Fan Out U.L. Pin Names An, Bn, Cn, Dn On Description HIGH/LOW Inputs Outputs 1.0/1.0 50/33.3 Input IIH/I IL Output I OH/IOL 20 µA/−0.6 mA −1 mA/20 mA © 1999 Fairchild Semiconductor Corporation DS009462 www.fairchildsemi.com 74F20 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) −0.5V to VCC −0.5V to +5.5V −65 °C to +150°C −55 °C to +125°C −55 °C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V Note...