74F219

54F 74F219 64-Bit Random Access Memory with TRI-STATE Outputs November 1994 54F 74F219 64-Bit Random Access Memory with TRI-STATE Outputs General Description The ’F219 is a high-speed 64-bit RAM organized as a 16-word by 4-bit array Address inputs are buffered to minimize loading and are fully decoded on-chip The outputs are TRI-STATE and are in the high-impedance state whenever the Chip Select (CS) input is HIGH The outputs are active only in the Read mode This device is similar to the ’F189 but features non-inverting rather than inverting data outputs Features Y Y Y Y Y TRI-STATE outputs for data bus applications Buffered inputs minimize loading Address decoding on-chip Diode clamped inputs minimize ringing Available in SOIC (300 mil only) Commercial 74F219PC Military Package Number N16E Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 300 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F219DL (Note 2) 74F219SC (Note 1) 74F219SJ (Note 1) 54F219FL (Note 2) 54F219LL (Note 2) J16A M16B M16D W16A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DLQB FLQB and LLQB Logic Symbol Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F 9500–1 TL F 9500 – 2 TL F 9500 – 3 TRI-STATE is a reg...