74F27

74F27 Triple 3-Input NOR Gate April 1988 Revised August 1999 74F27 Triple 3-Input NOR Gate General Description This device contains three independent gates, each of which performs the logic NOR function. Ordering Code: Order Number 74F27SC 74F27SJ 74F27PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL Function Table Inputs An L X X H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Output Cn L H X X On H L L L HIGH/LOW Output IOH/IOL A n , B n , Cn On Data Inputs Data Outputs 1.0/1.0 50/33.3 20 µA/−0.6 mA −1 mA/20 mA Bn L X H X © 1999 Fairchild Semiconductor Corporation DS009539 www.fairchildsemi.com 74F27 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) −0.5V to VCC −0.5V to +5.5V −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7....