74F38

74F38 Quad Two-Input NAND Buffer (Open Collector) April 1988 Revised November 1999 74F38 Quad Two-Input NAND Buffer (Open Collector) General Description This device contains four independent gates, each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation. Ordering Code: Order Number 74F38SC 74F38SJ 74F38PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Unit Loading/Fan Out U.L. Pin Names An , Bn On Note 1: OC = Open Collector Description HIGH/LOW Inputs Outputs 1.0/2.0 OC (Note 1) /106.6 Input IIH/IIL Output IOH/IOL 20 µA/−1.2 mA OC (Note 1) /64 mA Function Table Inputs A L L H H H = HIGH Voltage Level L = LOW Voltage Level Output B L H L H O H H H L © 1999 Fairchild Semiconductor Corporation DS009465 www.fairchildsemi.com 74F38 Absolute Maximum Ratings(Note 2) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCCPin Potential to Ground Pin Input Voltage (Note 3) Input Current (Note 3) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output...