Quad futurebus backplane transceiver
INTEGRATED CIRCUITS
74F3893 Quad futurebus backplane transceiver
Product specification IC15 Data Handbook 1991 Jan 18
...
Description
INTEGRATED CIRCUITS
74F3893 Quad futurebus backplane transceiver
Product specification IC15 Data Handbook 1991 Jan 18
Philips Semiconductors
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
FEATURES
Quad backplane transceiver Drives heavily loaded backplanes with equivalent load Futurebus drivers sink 100mA Reduced voltage swing (1 volt) produces less noise and
reduces power consumption High speed operation enhances performance of backplane buses and facilitates incident wave switching Compatible with IEEE 896 and IEEE 1194.1 Futurebus Standards Built–in precision band–gap (BG) reference provides accurate receiver thresholds and improved noise immunity Glitch–free power up/power down operation on all outputs impedances down to 10 ohms
much less for BTL, so is its receiver threshold region, therefore noise margins are excellent. BTL offers low power consumption, low ground bounce, EMI and crosstalk, low capacitive loading, superior noise margin and low propagation delays. This results in a high bandwidth, reliable backplane.
Pin and function compatible with NSC DS3893
DESCRIPTION
The 74F3893 has four TTL outputs (Rn) on the receiver side with a common receiver enable input (RE). It has four data inputs (Dn) which are also TTL. These data inputs are NANDed with the data enable input (DE). The four I/O pins (bus side) are futurebus compatible, sink a minimum of 100mA, and are designed to drive heavily loaded b...
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