74F807

Philips Semiconductors FAST Products Product specification Octal shift/count registered transceiver with adder and parity (3–State) FAST 74F807 FEATURES High speed parallel registers with this device only on the output states. Both OE pins are enabled low. All operating modes, other than clear, 3–State, and the two hold modes require the rising edge of the clock. All setup and hold times must be observed for proper functioning. Data on the internal register can be switched on either the A or B ports for output. Depeding on the state of the select inputs (S0, S1, S2), and carry in/ serial in/ clock enable (CI/SI/CE), the 74F807 has nine distinct operating modes: 1. Add mode w/carry in – the CI/SI/CE input is used as a carry in signal and the STATOUT output is the carry out signal. (In add mode the COUT is NOT registered. This means the carry output signal appears at the STATOUT output one clock prior to the related data.). In this mode, the CI/SI/CE input is added to the register contents and to the inputs. (The adder uses only the An inputs, not the Bn inputs.) 2. Add mode wo/carry in –– same as above except the CI/SI/CE input is not included in the addition. 3. Count w/count enable (count) –– the CI/SI/ CE input is now used as the count enable positive edge–triggered D–type flip–flops High speed full adder input and the STATOUT output is terminal count. In this mode the CI/SI/CE input must be high to enable the count function. The register contents are incremented...