Document
Philips Semiconductors FAST Products
Product specification
9-Bit latched bidirectional Futurebus transceivers (open-collector)
• Multiple GND pins minimize ground bounce • Glitch–free power up/power down
operation
74F8962/8963
FEATURES
• Octal latched transceiver • Drives heavily loaded backplanes with
on B port
power consumption and a series diode on the drivers to reduce capacitive loading. Incident wave switching to 9Ω is guaranteed. The voltage swing is much less for BTL, so is its receiver threshold region, therefore noise margins are excellent. BTL offers low power consumption, low ground bounce, EMI and crosstalk, low capacitive loading, superior noise margin and low propagation delays. This results in a high bandwidth, reliable backplane. The 74F8962 and 74F8963 A ports have TTL 3-state drivers and TTL receivers with a latch function. The 74F8963 is the non-inverting version of 74F8962.
equivalent load impedances down to 10Ω
• High drive (100mA) open collector drivers • Reduced voltage swing (1 volt) produces
less noise and reduces power consumption
DESCRIPTION
The 74F8962 and 74F8963 are octal bidirectional latched transceivers and are intended to provide the electrical interface to a high performance wired-OR bus. The B port inverting drivers are low-capacitance open collector with controlled ramp and are designed to sink 100mA from 2 volts. The B port inverting receivers have a 150mV threshold region. The B port interfaces to ‘Backplane Transceiver Logic’ (BTL). BTL features a reduced (1V to 2V) voltage swing for lower
• High speed operation enhances
performance of backplane buses and facilitates incident wave switching
• Compatible with IEEE 896 futurebus
standards
• Built–in precision band–gap reference
provides accurate receiver thresholds and improved noise immunity TYPE 74F8962 74F8963
TYPICAL PROPAGATION DELAY 6.5ns 5.5ns
TYPICAL SUPPLY CURRENT( TOTAL) 90mA 90mA
ORDERING INFORMATION
DESCRIPTION 44–pin Quad Flat Pack1 44–pin Plastic Leaded Chip Carrier Note to ordering information 1. Flatpack package is not available at this time. ORDER CODE COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F8962Y, N74F8963Y N74F8962A, N74F8963A
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS AI0 – AI8 B0 – B8 OEAB, OEBA LEAB, LEBA AO0 – AO8 PNP latched inputs Data inputs with threshold circuitry Output enable inputs (active low) Latch enable inputs (active low) 3–state outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/0.167 5.0/0.167 1.0/0.033 1.0/0.033 150/40 OC/166.7 LOAD VALUE HIGH/LOW 20µA/100µA 100µA/100µA 20µA/20µA 20µA/20µA 3mA/24mA OC/100mA
B0 – B8 Open collector outputs Notes to input and output loading and fan out table 1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state. 2. OC = Open collector.
March 11, 1993
1
853–1425 09230
Philips Semiconductors FAST Products
Product specification
9-Bit latched bidirectional Futurebus transceivers (open-collector)
PIN CONFIGURATION FLATP.