Document
74FR240 Octal Buffer/Line Driver with 3-STATE Outputs
October 1991 Revised August 1999
74FR240 Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74FR240 is an inverting octal buffer and line driver designed to be employed as memory and address driver, clock driver and bus oriented transmitter or receiver.
Features
s 3-STATE outputs drive bus lines or buffer memory address registers s Outputs sink 64 mA and source 15 mA s Guaranteed pin-to-pin skew
Ordering Code:
Order Number 74FR240SC 74FR240SJ 74FR240PC Package Number M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names OE1, OE2 I0–I7 O0–O7 Description Output Enable Input (Active-LOW) Inputs Outputs
Truth Tables
Inputs OE1 L L H Inputs OE2 L L H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Outputs In L H X (Pins 12, 14, 16, 18) H L Z Outputs In L H X (Pins 3, 5, 7, 9) H L Z
© 1999 Fairchild Semiconductor Corporation
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74FR240
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) Twice the Rated IOL (mA) 4000V −0.5V to VCC −0.5V to +5.5V −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID IOD IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ CIN Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input Low Current Input Leakage Test Output Circuit Leakage Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current Input Capacitance 9 37 31 8.0 −100 4.75 3.75 20 −20 −225 50 100 13 45 38 2.4 2.0 0.55 5 7 −150 Min 2.0 0.8 −1.2 Typ Max Units V V V V V V µA µA µA V µA µA µA mA µA µA mA mA mA pF Min Min Min Min Max Max Max 0.0 0.0 Max Max Max Max 0.0 Max Max Max 5.0 VCC Condi.