2-input NAND gate
INTEGRATED CIRCUITS
DATA SHEET
74HC1G00; 74HCT1G00 2-input NAND gate
Product specification File under Integrated Circui...
Description
INTEGRATED CIRCUITS
DATA SHEET
74HC1G00; 74HCT1G00 2-input NAND gate
Product specification File under Integrated Circuits, IC06 1998 Jul 30
Philips Semiconductors
Product specification
2-input NAND gate
FEATURES Wide operating voltage: 2.0 to 6.0 V Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Very small 5 pins package Output capability: standard. CPD DESCRIPTION The 74HC1G/HCT1G00 is a high speed Si-gate CMOS device. The 74HC1G/HCT1G00 provides the 2-input NAND function. The standard output currents are 1⁄2 compared to the 74HC/HCT00. FUNCTION TABLE See note 1. INPUTS inA L L H H Note 1. H = HIGH voltage level; L = LOW voltage level. inB L H L H OUTPUT outY H H H L PINNING PIN 1 2 3 4 5 SYMBOL inB inA GND outY VCC DESCRIPTION data input B data input A ground (0 V) data output Notes CI QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns
74HC1G00; 74HCT1G00
TYPICAL SYMBOL tPHL/tPLH PARAMETER propagation delay inA, inB to outY input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS HC1G CL = 15 pF; VCC = 5 V 7 HCT1G 10 ns UNIT
1.5 19
1.5 21
pF pF
1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. For HCT1G t...
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