Dual 2-input NAND gate
INTEGRATED CIRCUITS
DATA SHEET
74HC2G00; 74HCT2G00 Dual 2-input NAND gate
Product specification Supersedes data of 2002...
Description
INTEGRATED CIRCUITS
DATA SHEET
74HC2G00; 74HCT2G00 Dual 2-input NAND gate
Product specification Supersedes data of 2002 Jul 10 2003 Feb 12
Philips Semiconductors
Product specification
Dual 2-input NAND gate
FEATURES Wide supply voltage range from 2.0 to 6.0 V Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Very small 8 pins package Output capability is standard ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns. DESCRIPTION
74HC2G00; 74HCT2G00
The 74HC2G/HCT2G00 is a high-speed Si-gate CMOS device. The 74HC2G/HCT2G00 provides the 2-input NAND function.
TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; N = total load switching outputs; VCC = supply voltage in Volts; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For 74HC2G00 the condition is VI = GND to VCC. For 74HCT2G00 the condition is VI = GND to VCC − 1.5 V. PARAMETER propagation delay nA, nB to nY input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC2G00 CL = 50 pF; VCC = 4.5 V 9 1.5 10 HCT2G00 12 1.5 10 ns pF pF UNIT
2003 Feb 12
2
Philips Semiconductors
Product specification
Dual 2-input NAND gate
FUNCTION TABLE See not...
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