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74HC4046

Fairchild

CMOS Phase Lock Loop

MM74HC4046 CMOS Phase Lock Loop February 1984 Revised February 1999 MM74HC4046 CMOS Phase Lock Loop General Descriptio...


Fairchild

74HC4046

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Description
MM74HC4046 CMOS Phase Lock Loop February 1984 Revised February 1999 MM74HC4046 CMOS Phase Lock Loop General Description The MM74HC4046 is a low power phase lock loop utilizing advanced silicon-gate CMOS technology to obtain high frequency operation both in the phase comparator and VCO sections. This device contains a low power linear voltage controlled oscillator (VCO), a source follower, and three phase comparators. The three phase comparators have a common signal input and a common comparator input. The signal input has a self biasing amplifier allowing signals to be either capacitively coupled to the phase comparators with a small signal or directly coupled with standard input logic levels. This device is similar to the CD4046 except that the Zener diode of the metal gate CMOS device has been replaced with a third phase comparator. Phase Comparator I is an exclusive OR (XOR) gate. It provides a digital error signal that maintains a 90 phase shift between the VCO’s center frequency and the input signal (50% duty cycle input waveforms). This phase detector is more susceptible to locking onto harmonics of the input frequency than phase comparator I, but provides better noise rejection. Phase comparator III is an SR flip-flop gate. It can be used to provide the phase comparator functions and is similar to the first comparator in performance. Phase comparator II is an edge sensitive digital sequential network. Two signal outputs are provided, a comparator output and a phase p...




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