74HC7404

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT7404 5-Bit x 64-word FIFO register; 3-state Product specification Supersedes data of October 1990 File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specification 5-Bit x 64-word FIFO register; 3-state FEATURES Synchronous or asynchronous operation 3-state outputs 30 MHz (typical) shift-in and shift-out rates Readily expandable in word and bit dimensions Pinning arranged for easy board layout: input pins directly opposite output pins Output capability: driver (8 mA) ICC category: LSI. APPLICATIONS High-speed disc or tape controller Communications buffer. GENERAL DESCRIPTION 74HC/HCT7404 The 74HC/HCT7404 are high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no.7A. The “7404” is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 5 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications. A higher data-rate can be obtained in applications where the status flags are not used (burst-mode). With separate controls for shift-in (SI) and shift-out (SO), reading and writing operations are completely independent, allowing synchronous and asynchronous data transfers. Additional controls include a master-reset input...