Microprocessor
TinyRISC® LR4102 Microprocessor
Datasheet
The TinyRISC LR4102 Microprocessor is a compact, high performance 32-bit micro...
Description
TinyRISC® LR4102 Microprocessor
Datasheet
The TinyRISC LR4102 Microprocessor is a compact, high performance 32-bit microprocessor implemented in the LSI Logic G11™ technology. The LR4102 is a complete microprocessor solution with caches, an external bus interface with built-in memory controllers, and on-chip debug. The LR4102 is built using the EZ4102 EasyMACRO subsystem, available to customers through the LSI Logic CoreWare® program. The LR4102 provides a 32-bit FBusMACRO to control all off-chip data transactions (including DRAM or SDRAM) and an EJTAG interface for on-chip debug with PC trace output. Figure 1 illustrates the LR4102 chip.
Figure 1
LR4102
LR4102 Block Diagram
MMU
TLB RAM Caches
Clock Controller
32-bit TinyRISC 4102 CPU and FastMDU
BIU and Cache Controller (BBCC)
OCM FBusMACRO FBus
Two 32-bit Timers
SerialICE™-1 Port EJTAG
SerialICE-1
Interface EJTAG Interface
EJTAG Extended Debug MACRO
PC Trace Output
The LR4102 microprocessor is powered by either 2.5 V (for 85 MHz operation) or 1.8 V (for 50 MHz operation). The chip I/O ring requires 3.3 V. With a system clock of 85 MHz, peak performance is 85 MIPS and sustained performance is estimated at 68 MIPS. With a 50 MHz clock, performance is 50 MIPS peak and 40 MIPS sustained.
March 2000
Copyright © 1998–2000 by LSI Logic Corporation. All rights reserved.
1
LR4102 Features
Components
Caches – – 16 Kbytes of two-way set-associative I-Cache 8 Kbytes of direct-mapped D-Cache
R3000 MIPS CPU exec...
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