PPC405EP

Part Number PPC405EP Revision 1.02 – January 10, 2005 PPC405EP Features Data Sheet PowerPC 405EP Embedded Processor AMCC PowerPC® 405 32-bit RISC processor core operating up to 333MHz with 16KB Dand I-caches PC-133 synchronous DRAM (SDRAM) interface - 32-bit interface for non-ECC applications 4KB on-chip memory (OCM) External peripheral bus - Flash ROM/Boot ROM interface - Direct support for 8- or 16-bit SRAM and external peripherals - Up to five devices DMA support for memory and UARTs. - Scatter-gather chaining supported - Four channels PCI Revision 2.2 compliant interface (32-bit, up to 66MHz) - Asynchronous PCI Bus interface - Internal or external PCI Bus Arbiter Two Ethernet 10/100Mbps (full-duplex) ports with media independent interface (MII) Programmable interrupt controller supports seven external and 19 internal edge-triggered or level-sensitive interrupts Programmable timers Software accessible event counters Two serial ports (16750 compatible UART) One IIC interface General purpose I/O (GPIO) available Supports JTAG for board level testing Internal processor local Bus (PLB) runs at SDRAM interface frequency Supports PowerPC processor boot from PCI memory Description Designed specifically to address embedded applications, the PowerPC 405EP (PPC405EP) provides a high-performance, low-power solution that interfaces to a wide range of peripherals by incorporating on-chip power management features and lower power dissipation req...