DG202

DG201A, DG202 Data Sheet June 1999 File Number 3117.2 Quad SPST, CMOS Analog Switches The DG201A and DG202 quad SPST analog switches are designed using Intersil’s 44V CMOS process. These bidirectional switches are latch-proof and feature breakbefore-make switching. Designed to block signals up to 30VP-P in the OFF state, the DG201A and DG202 offer the advantages of low ON resistance (≤175Ω), wide input signal range (±15V) and provide both TTL and CMOS compatibility. The DG201A and DG202 are specification and pinout compatible with the industry standard devices. Features Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . ±15V Low rDS(ON) (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175Ω TTL, CMOS Compatible Latch-Up Proof True Second Source Maximum Supply Ratings. . . . . . . . . . . . . . . . . . . . . . 44V Logic Inputs Accept Negative Voltages Ordering Information PART NUMBER DG201AAK DG201ABK DG201ACJ DG201ACY DG202AK DG202CJ TEMP. RANGE (oC) -55 to 125 -25 to 85 0 to 70 0 to 70 -55 to 125 0 to 70 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld SOIC 16 Ld CERDIP 16 Ld PDIP PKG. NO. F16.3 F16.3 E16.3 M16.3 F16.3 E16.3 Functional Block Diagrams DG201A S1 IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 Pinout DG201A, DG202 (CERDIP, PDIP, SOIC) TOP VIEW 1 2 3 4 5 6 7 8 16 IN2 15 D2 14 S2 13 V+ (SUBSTRATE) 12 NC 11 S3 10 D3 9 IN3 IN4 D4 DG202 S1 IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 IN4 D4 IN1 D1 S1 VGND S4 D4 IN4 SWITCHES SHOWN FOR LOGIC “1” INPU...