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54HC4050

Maxwell

CMOS Logic Hex Non-Inverting Buffers

CMOS Logic Hex Non-Inverting Buffers 54HC4050 Logic Diagram Memory FEATURES: • High speed CMOS logic hex non-inverti...


Maxwell

54HC4050

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Description
CMOS Logic Hex Non-Inverting Buffers 54HC4050 Logic Diagram Memory FEATURES: High speed CMOS logic hex non-inverting buffers RAD-PAK® radiation hardened against natural space radiation Single Event Effects: - SEL: > 120 MeV/mg/cm2 Total dose hardness: - > 100 Krad (Si), depending upon space mission Package: -16 Pin RAD-PAK® Flat Pack Typical propagation delay: - 6ns at VCC = 5V, CL = 15pF, TA = 25°C High-to-Low voltage level converter for up to VI = 16V Fanout (over temperature range) -10 LSTTL loads (Standard Outputs) -15 LSTTL loads (Bus Driver Outputs) Balanced propagation delay and transition times Significant power reduction compared to LSTTL logic ICs 2V to 6V operation High noise immunity -NIL = 30%, NIH = 30% of VCC at VCC = 5V DESCRIPTION: Maxwell Technologies' 54HC4050 high speed CMOS Logic Hex Non-Inverting Buffers features a greater than 100 krad(Si) total dose tolerance, depending upon space mission. These parts have a modified input protection structure that enables them to be used as logic level translators which will convert high-level logic to a low-level logic while operating off the lowlevel logic supply. For example, 15V input pulse levels can be down-converted to 0V to 5V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. The 54HC4050 can be used as simple buffers or inverters without level translation. Maxwell Technologies' patented RAD-PAK® packaging technology...




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