STP6NA60FP
N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR
PRELIMINARY DATA TYPE STP6NA60F P
s s s s s s s
V DSS...
STP6NA60FP
N - CHANNEL ENHANCEMENT MODE FAST POWER MOS
TRANSISTOR
PRELIMINARY DATA TYPE STP6NA60F P
s s s s s s s
V DSS 600 V
R DS(on) < 1.2 Ω
ID 3.9 A
TYPICAL RDS(on) = 1 Ω ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100oC LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED REDUCED THRESHOLD VOLTAGE SPREAD
1
3 2
DESCRIPTION This series of POWER MOSFETS represents the most advanced high voltage technology. The optmized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol V DS VDGR V GS ID ID I DM ( ) P t ot V ISO T stg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) Gate-source Voltage Drain Current (continuous) at T c = 25 o C o Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at Tc = 25 o C Derating Factor Insulation W ithstand Voltage (DC) St orage Temperature Max. Operating Junction Temperature Valu e 600 600 ± 30 3.9 2.6 26 40 0.32 2000 -65 to 150 150 Unit V V V A A A W o W/ C V o C o C
() Pulse width limited by safe operating area
October 1997
1/5
STP6NA60FP
THERMAL DATA
R t hj-ca se R t hj...