MC14522B

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Presettable 4-Bit Down Counters The MC14522B BCD counter and the MC14526B binary counter are constructed with MOS P–channel and N–channel enhancement mode devices in a monolithic structure. These devices are presettable, cascadable, synchronous down counters with a decoded “0” state output for divide–by–N applications. In single stage applications the “0” output is applied to the Preset Enable input. The Cascade Feedback input allows cascade divide–by–N operation with no additional gates required. The Inhibit input allows disabling of the pulse counting function. Inhibit may also be used as a negative edge clock. These complementary MOS counters can be used in frequency synthesizers, phase–locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity. Supply Voltage Range = 3.0 Vdc to 18 Vdc Logic Edge–Clocked Design — Incremented on Positive Transition of Clock or Negative Transition of Inhibit Asynchronous Preset Enable Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol VDD Parameter DC Supply Voltage Value MC14522B MC14526B L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Unit V V mA mW – 0.5 to + 18.0 ± 10 500 – 65 to + 150 260 Vin, Vout Iin, Iout PD Tstg TL Input or Ou...