Pager receiver
INTEGRATED CIRCUITS
DATA SHEET
UAA3500HL Pager receiver
Preliminary specification Supersedes data of 1999 Mar 30 File u...
Description
INTEGRATED CIRCUITS
DATA SHEET
UAA3500HL Pager receiver
Preliminary specification Supersedes data of 1999 Mar 30 File under Integrated Circuits, IC17 2000 Jan 18
Philips Semiconductors
Preliminary specification
Pager receiver
FEATURES Double frequency conversion, zero-IF receiver with: – Configurable in all paging bands (130 to 930 MHz) – Low noise amplifier featured with four step Automatic Gain Control (AGC) – Down-conversion mixers – On-chip, zero-IF channel filter – I/Q, non-demodulated outputs – Highpass filters to remove DC offsets. External Voltage Controlled Oscillator (VCO): – Both Local Oscillators (LOs) derived from the VCO. APPLICATIONS FLEXTM, ERMES and POCSAG pagers Remote control terminals. GENERAL DESCRIPTION The UAA3500HL is a one-chip pager receiver complying with POCSAG, FLEXTM and ERMES standards. The IC performs in accordance with specifications in the −10 to +55 °C temperature range. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UAA3500HL LQFP48 DESCRIPTION
UAA3500HL
The UAA3500HL contains a front-end receiver, which can be configured through external components for any frequency band between 130 and 930 MHz. The back-end receiver consists of the channel filter and limiters. An external VCO ensures the Local Oscillator (LO) for the front-end. Designed in an advanced BiCMOS process, it combines high performance with low-power consumption and a high degree of integration, thus reducing external component costs and total radio size. Its first ad...
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