Document
54 74ETL16245 16-Bit Data Transceiver with Incident Wave Switching
PRELIMINARY
May 1994
54 74ETL16245 16-Bit Data Transceiver with Incident Wave Switching
General Description
The 54 74ETL16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs designed with incident wave switching live insertion support and enhanced noise margin for TTL backplane applications
Both the A and B ports include a bus hold circuit to latch the output to the value last forced on that pin
The B port of this device includes 25X series output resistors which minimize undershoot and ringing
Features
Y Supports the VME64 ETL specification Y Functionally and pin compatible with industry standard
TTL 16245 SSOP pinout
Y Improved TTL-compatible input threshold range
Y High drive TTL-compatible outputs (IOH e b60 mA IOL e 90 mA)
Y Supports 25X incident wave switching on the A port
Y BiCMOS design significantly reduces power dissipation
Y Distributed VCC and GND pin configuration minimizes high-speed switching noise
Y 25X series-dampening resistor on B-port
Y Available in 48-pin SSOP and ceramic flatpak
Y Guaranteed output skew
Y Guaranteed simultaneous switching noise level and dynamic threshold performance
Y Guaranteed latchup protection
Logic Symbol
Connection Diagram
Pin Assignment for SSOP and Flatpak
TL F 11654 – 1
Pin Description
Pin Names
DIR OE An Bn
Description
Transmit Receive Input Output Enable Input (Active LOW) Backplane Bus Data Local Bus Data
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 11654
TL F 11654 – 2 RRD-B30M105 Printed in U S A
Functional Description
The device uses byte-wide Direction (DIR) control and Output Enable (OE) controls The DIR inputs determine the direction of data flow through the device The OE inputs disable the A and the B ports The part contains active circuitry which keeps all outputs disabled when VCC is less than 2 2V to aid in live insertion applications
Logic Diagrams (Positive Logic)
Truth Table (Each 8-bit Section)
Inputs
OE DIR
LL LH HX
Operation
A Data to B Bus B Data to A Bus Isolation
TL F 11654–3
ETL’s Improved Noise Immunity
TTL input thresholds are typically determined by temperature-dependent junction voltages which result in worst case input thresholds between 0 8V and 2 0V By contrast ETL provides greater noise immunity because its input thresholds are determined by current mode input circuits similar to those used for ECL or BTL ETL’s worst case input thresholds between 1 4V and 1 6V are compensated for temperature voltage and process variations
TL F 11654 – 4
Incident Wave Switching
When TTL logic is used to drive fully loaded backplanes the combination of low backplane bus characteristic impedance wide TTL input threshold range and limited TTL drive generally require multiple waveform reflections before a valid signal can be received across the backplane The VME International Trade Association (VITA) defined ETL to provide incident wave switching which increases the data transfer rate of a VME backplane and extends the life of VME applications TTL compatibility with existing VME backplanes and modules was maintained
Improved Input Threshold Characteristics of ETL
ABTC Worst Case VOUT – VIN
TL F 11654–5
ETL Worst Case VOUT – VIN
TL F 11654 – 6
2
Incident Wave Switching (Continued)
To demonstrate the incident wave switching capability consider a VME application A VME bus must be terminated to a2 94V with 190X at each end of its 21 card backplane The surge impedance presented by a fully loaded VME backplane is approximately 25X If the output voltage current of an ABTC driver is plotted with this load the inter-
section at 1 2V for a falling edge and at 1 6V for a rising edge does not reach the worst case input threshold of a second ABTC circuit This is shown in the two figures below However an ETL driver located at one end of the backplane is able to provide incident wave switching because it has a higher drive and a tighter input threshold
Estimated ETL ABTC Initial Falling Edge Step
Because ETL has a much more precise input threshold region an ETL receiver will interpret its predicted falling input of 0 85V as a logic ZERO and the initial rising edge of 1 9V as a logic ONE This comparison is for the case of a 25X surge impedance backplane driven from one end
TL F 11654 – 7
Estimated ETL ABTC Initial Rising Edge Step
TL F 11654 – 8
The resulting ABTC and ETL waveform predictions and their input thresholds are compared below This shows how ETL can achieve backplane speeds not always possible with conventional TTL compatible logic families
Comparing the Incident Wave Switching of ETL with ABTC
TL F 11654 – 9
3
Incident Wave Switching (Continued)
The figure VCC Power-up Critical Voltages shows the relationship between OE and VCC while power is being applied and removed
VCC and OE Power-up Relationship
TL F 11654 – 10
4
Absolute Maximum Ratings (Note 1.