Document
ST24LC21B, ST24LW21 ST24FC21, ST24FC21B, ST24FW21
1 Kbit (x8) Dual Mode Serial EEPROM for VESA PLUG & PLAY
1 MILLION ERASE/WRITE CYCLES 40 YEARS DATA RETENTION 3.6V to 5.5V or 2.5V to 5.5V SINGLE SUPPLY VOLTAGE HARDWARE WRITE CONTROL (ST24LW21 and ST24FW21) TTL SCHMITT-TRIGGER on VCLK INPUT 100k / 400k Hz COMPATIBILITY with the I2C BUS BIT TRANSFER RANGE TWO WIRE SERIAL INTERFACE I2C BUS COMPATIBLE I2C PAGE WRITE (up to 8 Bytes) I2C BYTE, RANDOM and SEQUENTIAL READ MODES SELF TIMED PROGRAMMING CYCLE AUTOMATIC ADDRESS INCREMENTING ENHANCED ESD/LATCH UP PERFORMANCES ERROR RECOVERY MECHANISM (ST24FC21 and ST24FW21) VESA 2 COMPATIBLE DESCRIPTION The ST24LC21B, ST24LW21, ST24FC21, ST24FC21B and ST24FW21 are 1K bit electrically erasable programmable memory (EEPROM), organized in 128x8 bits. In the text, products are referred as ST24xy21, where "x" is either "L" for VESA 1 or "F" for VESA 2 compatible memories and where "y" indicates the Write Control pin connection: "C" means WC on pin 7 and "W" means WC on pin 3.
8 1
PSDIP8 (B) 0.25mm Frame
8 1
SO8 (M) 150mil Width
Figure 1. Logic Diagram
VCC
SCL VCLK WC ST24xy21
SDA
Table 1. Signal Names
SDA SCL VCC VSS VCLK WC Serial Data Address Input/Output
2 Serial Clock (I C mode)
VSS
AI01741
Supply Voltage Ground Clock Transmit only mode Write Control
Note: WC signal is only available for ST24LW21 and ST24FW21 products.
June 2002
1/22
ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21
Figure 2A. DIP Pin Connections Figure 2B. SO Pin Connections
ST24LC21B NC NC NC VSS 1 2 3 4 8 7 6 5
AI01742
ST24LC21B
VCC VCLK SCL SDA
NC NC NC VSS
1 2 3 4
8 7 6 5
AI01743
VCC VCLK SCL SDA
Warning: NC = Not Connected.
Warning: NC = Not Connected.
Figure 2C. DIP Pin Connections
Figure 2D. SO Pin Connections
ST24FC21 ST24FC21B NC NC DU VSS 1 2 3 4 8 7 6 5
AI01744
ST24FC21 ST24FC21B VCC VCLK SCL SDA NC NC DU VSS 1 2 3 4 8 7 6 5
AI01745
VCC VCLK SCL SDA
Warning: NC = Not Connected. DU = Don’t Use, must be left open or connected to VCC or VSS.
Warning: NC = Not Connected. DU = Don’t Use, must be left open or connected to VCC or VSS.
Figure 2E. DIP Pin Connections
Figure 2F. SO Pin Connections
ST24FW21 ST24LW21 NC NC WC VSS 1 2 3 4 8 7 6 5
AI01746
ST24FW21 ST24LW21 VCC VCLK SCL SDA NC NC WC VSS 1 2 3 4 8 7 6 5
AI01747
VCC VCLK SCL SDA
Warning: NC = Not Connected.
Warning: NC = Not Connected.
2/22
ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21
Table 2. Absolute Maximum Ratings (1)
Symbol TA TSTG TLEAD VIO VCC VESD Parameter Ambient Operating Temperature Storage Temperature Lead Temperature, Soldering Input or Output Voltages Supply Voltage Electrostatic Discharge Voltage (Human Body model) Electrostatic Discharge Voltage (Machine model)
(3) (2)
Value –40 to 85 –65 to 150
Unit °C °C °C V V V V
(SO8 package) (PSDIP8 package)
40 sec 10 sec
215 260 –0.3 to 6.5 –0.3 to 6.5 4000 500
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. MIL-STD-883C, 3015.7 (100pF, 1500 Ω). 3. EIAJ IC-121 (Condition C) (200pF, 0 Ω).
Table 3A. Device Select Code (ST24LC21B, ST24LW21, ST24FC21 and ST24FW21)
Device Code Bit Device Select b7 1 b6 0 b5 1 b4 0 b3 X Chip Enable b2 X b1 X RW b0 RW
Note: The MSB b7 is sent first. X = 0 or 1.
Table 3B. Device Select Code (ST24FC21B)
Device Code Bit Device Select b7 1 b6 0 b5 1 b4 0 b3 0 Chip Enable b2 0 b1 0 RW b0 RW
Note: The MSB b7 is sent first. X = 0 or 1.
DESCRIPTION (cont’d) The ST24xy21 can operate in two modes: Transmit-Only mode and I2C bidirectional mode. When powered, the device is in Transmit-Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. When in I2C mode, the ST24LC21B (or the ST24LW21) cannot switch back to the Transmit Only mode (except when the power supply is removed). For the ST24FC21, ST24FC21B (or the ST24FW21), after the falling edge of SCL, the memory enter in a transition state which allowed to
switch back to the Transmit-Only mode if no valid I2C activity is observed. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. Transmit Only Mode After a Power-up, the ST24xy21 is in the Transmit Only mode. A proper initialization sequence (see Figure 3) must supply nine clock pulses on the VCLK pin (in order to internally synchronize the device). During this initialization sequence, the SDA pin is in high impedance. On the rising edge of the tenth pulse applied on .