DatasheetsPDF.com

Volume Control. CS4341 Datasheet

DatasheetsPDF.com

Volume Control. CS4341 Datasheet
















CS4341 Control. Datasheet pdf. Equivalent













Part

CS4341

Description

24-Bit / 96 kHz Stereo DAC with Volume Control



Feature


CS4341 24-Bit, 96 kHz Stereo DAC with V olume Control Features l Complete Ster eo DAC System: Interpolation, D/A, Outp ut Analog Filtering l ATAPI Mixing l 10 1 dB Dynamic Range l 89 dBFS THD+N l Lo w Clock Jitter Sensitivity l +3 V to +5 V Power Supply l Filtered Line Level O utputs l On-Chip Digital De-emphasis fo r 32, 44.1, and 48 kHz l Digital Volume Control with Soft.
Manufacture

Cirrus Logic

Datasheet
Download CS4341 Datasheet


Cirrus Logic CS4341

CS4341; Ramp – 94 dB Attenuation – 1 dB Ste p Size – Zero Crossing Click-Free Tra nsitions l 30 mW with 3 V supply I Des cription The CS4341 is a complete stere o digital-to-analog system including di gital interpolation, fourth-order delta sigma digital-to-analog conversion, dig ital de-emphasis, volume control, chann el mixing and analog filtering. The adv antages of this architec.


Cirrus Logic CS4341

ture include: ideal differential lineari ty, no distortion mechanisms due to res istor matching errors, no linearity dri ft over time and temperature and a high tolerance to clock jitter. The CS4341 accepts data at audio sample rates from 2 kHz to 100 kHz, consumes very little power and operates over a wide power s upply range. These features are ideal f or DVD, A/V receiv.


Cirrus Logic CS4341

er and set-top box systems. ORDERING IN FORMATION CS4341-KS 16-pin SOIC, -10 to 70 °C CDB4341 Evaluation Board S CL/CCLK SDA/CDIN AD0/CS MUTEC RST SCL K LRCK SDATA Serial Port Control Port Interpolation Filter Interpolation Fil ter External Mute Control Volume Cont rol ∆Σ DAC Analog Filter AOUTA M ixer Volume Control ∆Σ DAC Analog Filter AOUTB ÷2 MCLK .





Part

CS4341

Description

24-Bit / 96 kHz Stereo DAC with Volume Control



Feature


CS4341 24-Bit, 96 kHz Stereo DAC with V olume Control Features l Complete Ster eo DAC System: Interpolation, D/A, Outp ut Analog Filtering l ATAPI Mixing l 10 1 dB Dynamic Range l 89 dBFS THD+N l Lo w Clock Jitter Sensitivity l +3 V to +5 V Power Supply l Filtered Line Level O utputs l On-Chip Digital De-emphasis fo r 32, 44.1, and 48 kHz l Digital Volume Control with Soft.
Manufacture

Cirrus Logic

Datasheet
Download CS4341 Datasheet




 CS4341
CS4341
24-Bit, 96 kHz Stereo DAC with Volume Control
Features
l Complete Stereo DAC System: Interpolation,
D/A, Output Analog Filtering
l ATAPI Mixing
l 101 dB Dynamic Range
l 89 dBFS THD+N
l Low Clock Jitter Sensitivity
l +3 V to +5 V Power Supply
l Filtered Line Level Outputs
l On-Chip Digital De-emphasis for 32, 44.1,
and 48 kHz
l Digital Volume Control with Soft Ramp
– 94 dB Attenuation
– 1 dB Step Size
– Zero Crossing Click-Free Transitions
l 30 mW with 3 V supply
I
Description
The CS4341 is a complete stereo digital-to-analog sys-
tem including digital interpolation, fourth-order delta-
sigma digital-to-analog conversion, digital de-emphasis,
volume control, channel mixing and analog filtering. The
advantages of this architecture include: ideal differential
linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and tempera-
ture and a high tolerance to clock jitter.
The CS4341 accepts data at audio sample rates from
2 kHz to 100 kHz, consumes very little power and oper-
ates over a wide power supply range. These features are
ideal for DVD, A/V receiver and set-top box systems.
ORDERING INFORMATION
CS4341-KS
16-pin SOIC, -10 to 70 °C
CDB4341
Evaluation Board
SCL/CCLK SDA/CDIN AD0/CS
MUTEC
RST
SCLK
LRCK
SDATA
Control Port
Interpolation Filter
Interpolation Filter
External
Mute Control
Volume Control
∆Σ DAC
Analog Filter
AOUTA
Mixer
Volume Control
∆Σ DAC
Analog Filter
AOUTB
÷2
MCLK
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 1999
(All Rights Reserved)
AUG ‘99
DS298PP2
1




 CS4341
CS4341
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 5
ANALOG CHARACTERISTICS ................................................................................................ 5
POWER AND THERMAL CHARACTERISTICS....................................................................... 7
DIGITAL CHARACTERISTICS ................................................................................................. 7
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 7
RECOMMENDED OPERATING CONDITIONS ....................................................................... 7
SWITCHING CHARACTERISTICS .......................................................................................... 8
SWITCHING CHARACTERISTICS - CONTROL PORT......................................................... 10
2. TYPICAL CONNECTION DIAGRAM .................................................................................... 12
3. REGISTER QUICK REFERENCE .......................................................................................... 13
3.1 MCLK Control (address 00h) ............................................................................................ 13
3.2 Mode Control (address 01h) ............................................................................................. 13
3.3 Volume and Mixing Control (address 02h)........................................................................ 14
3.4 Channel A Volume Control (address 03h) ........................................................................ 14
3.5 Channel B Volume Control (address 04h) ........................................................................ 14
4. REGISTER BIT DESCRIPTION .............................................................................................. 15
4.1 Master Clock Divide Enable.............................................................................................. 15
4.2 Auto-Mute ......................................................................................................................... 15
4.3 Digital Interface Format..................................................................................................... 16
4.4 De-emphasis Control ........................................................................................................ 16
4.5 Power On/Off Quiescent Voltage Ramp ........................................................................... 17
4.6 Power Down...................................................................................................................... 17
4.7 Channel A Volume = Channel B Volume.......................................................................... 18
4.8 Soft Ramp or Zero Cross Enable...................................................................................... 18
4.9 ATAPI Channel Mixing and Muting ................................................................................... 19
4.10 Mute ................................................................................................................................ 20
4.11 Volume Control ............................................................................................................... 21
5. PIN DESCRIPTION ................................................................................................................. 22
Analog Power - VA.................................................................................................................. 22
Analog Ground - AGND .......................................................................................................... 22
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
I2C is a registered trademark of Philips Semiconductors.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of
this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-
marks and service marks can be found at http://www.cirrus.com.
2 DS298PP2




 CS4341
CS4341
Analog Output - AOUTA and AOUTB..................................................................................... 22
Reference Ground - REF_GND.............................................................................................. 22
Positive Voltage Reference - FILT+........................................................................................ 22
Quiescent Voltage - VQ .......................................................................................................... 22
Master Clock - MCLK ............................................................................................................. 23
Left/Right Clock - LRCK ......................................................................................................... 23
Serial Audio Data - SDATA .................................................................................................... 23
Serial Clock - SCLK ................................................................................................................ 24
Reset - RST............................................................................................................................ 24
Serial Control Interface Clock - SCL/CCLK ........................................................................... 24
Serial Control Data I/O - SDA/CDIN ....................................................................................... 24
Address Bit / Chip Select - AD0/CS........................................................................................ 24
Mute Control - MUTEC ........................................................................................................... 24
6. APPLICATIONS ..................................................................................................................... 25
6.1 Grounding and Power Supply Decoupling ....................................................................... 25
6.2 Oversampling Modes ....................................................................................................... 25
6.3 Recommended Power-up Sequence ............................................................................... 25
6.4 Use of the Power ON/OFF Quiescent Voltage Ramp ..................................................... 25
7. CONTROL PORT INTERFACE .............................................................................................. 26
7.1 SPI Mode ......................................................................................................................... 26
7.2 I2C Compatible Mode ...................................................................................................... 26
7.2 Memory Address Pointer (MAP) ....................................................................................... 27
8. PARAMETER DEFINITIONS .................................................................................................. 33
Total Harmonic Distortion + Noise (THD+N) .......................................................................... 33
Dynamic Range ...................................................................................................................... 33
Interchannel Isolation ............................................................................................................. 33
Interchannel Gain Mismatch ................................................................................................... 33
Gain Error ............................................................................................................................... 33
Gain Drift ................................................................................................................................ 33
9. REFERENCES ........................................................................................................................ 33
10. PACKAGE DIMENSIONS .................................................................................................... 34
LIST OF FIGURES
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
External Serial Mode Input Timing ................................................................................. 9
Internal Serial Mode Input Timing .................................................................................. 9
Internal Serial Clock Generation .................................................................................... 9
I2C Control Port Timing ................................................................................................ 10
SPI Control Port Timing ............................................................................................... 11
Typical Connection Diagram ........................................................................................ 12
SPI Mode Control Port Formating ................................................................................ 27
I2C Mode Control Port Formating ................................................................................ 27
Base-Rate Stopband Rejection .................................................................................... 28
Base-Rate Transition Band .......................................................................................... 28
Base-Rate Transition Band (Detail) ............................................................................. 28
Base-Rate Passband Ripple ........................................................................................ 28
High-Rate Stopband Rejection .................................................................................... 28
High-Rate Transition Band ........................................................................................... 28
High-Rate Transition Band (Detail) .............................................................................. 29
High-Rate Passband Ripple ......................................................................................... 29
Output Test Load ......................................................................................................... 29
DS298PP2
3




Recommended third-party CS4341 Datasheet







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)